AX88796 datasheet(43/71 Pages) ASIX

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ASIX ELECTRONICS CORPORATION

AX88796 L

3-in-1 Local Bus Fast Ethernet Controller

5.2.3 MR2, MR3 -- Identification Registers (1 and 2) Bit Descriptions

FIELD

TYPE

DESCRIPTION

2.15:0 (OUI[3:18])

Organizationally Unique Identifier. The third through the twenty-fourth

bit of the OUI assigned to the PHY manufacturer by the IEEE are to be

placed in bits. 2.15:0 and 3.15:10. This value is programmable.

3.15:10 (OUI[19:24])

Organizationally Unique Identifier. The remaining 6 bits of the OUI. The

value for bits 24:19 is programmable.

3.9:4 (MODEL[5:0])

Model Number. 6-bit model number of the device. The model number is

programmable.

3.3:0 (VERSION[3:0])

Revision Number. The value of the present revision number. The version

number is programmable.

5.2.4 MR4 – Autonegotiation Advertisement Registers Bit Descriptions

FIELD

TYPE

DESCRIPTION

4.15 (NEXT_PAGE)

R/W

Next Page. The next page function is activated by setting this bit to a 1. This

will allow the exchange of additional data. Data is carried by optional next

pages of information.

4.14 (ACK)

R/W

Acknowledge. This bit is the acknowledge bit from the link code word.

4.13 (REM_FAULT)

R/W

Remote Fault. When set to 1, the PHY indicates to the link partner a remote

fault condition.

4.12:10 (PAUSE)

R/W

Pause. When set to a 1, it indicates that the PHY wishes to exchange flow

control information with its link partner.

4.9 (100BASET4)

R/W

100Base-T4. This bit should always be set to 0.

4.8 (100BASET_FD)

R/W

100Base-TX Full Duplex. If written to 1, autonegotiation will advertise

that the PHY is capable of 100Base-TX full-duplex operation.

4.7 (100BASETX)

R/W

100Base-TX. If written to 1, autonegotiation will advertise that the PHY is

capable of 100Base-TX operation.

4.6 (10BASET_FD)

R/W

10Base-T Full Duplex. If written to 1, autonegotiation will advertise that

the PHY is capable of 10Base-T full-duplex operation.

4.5 (10BASET)

R/W

10Base-T. If written to 1, autonegotiation will advertise that the PHY is

capable of 10Base-T operation.

4.4:0 (SELECT)

R/W

Selector Field. Reset with the value 00001 for IEEE 802.3.

5.2.5 MR5 – Autonegotiation Link Partner Ability (Base Page) Register Bit

Descriptions

FIELD

TYPE

DESCRIPTION

5.15

(LP_NEXT_PAGE)

Link Partner Next Page. When this bit is set to 1, it indicates that the link

partner wishes to engage in next page exchange.

5.14 (LP_ACK)

Link Partner Acknowledge. When this bit is set to 1, it indicates that the

link partner has successfully received at least three consecutive and

consistent FLP bursts.

5.13

(LP_REM_FAULT)

Remote Fault. When this bit is set to 1, it indicates that the link partner has

a fault.

5.12:5

(LP_TECH_ABILITY)

Technology Ability Field. This field contains the technology ability of the

link partner. These bits are similar to the bits defined for the MR4 register

(see Table 16).

5.4:0 (LP_SELECT)

Selector Field. This field contains the type of message sent by the link

partner. For IEEE 802.3 compliant link partners, this field should read

00001.

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