PCF8833USLASH2DA datasheet(83/112 Pages) PHILIPS

83 / 112 page

2003 Feb 14

Philips Semiconductors

Objective speciﬁcation

STN RGB - 132

× 132 × 3 driver

PCF8833

Table 87 Possible MMVOPCAL values

MMVOPCAL[5:0]

DECIMAL EQUIVALENT

VLCD OFFSET

011111

+1240 mV

011110

+1200 mV

011101

+1160 mV

:::

000010

+80 mV

000001

+40 mV

000000

0 mV

111111

−1

−40 mV

111110

−2

−80 mV

:::

100010

−30

−1200 mV

100001

−31

−1240 mV

100000

−32

−1280 mV

15.2

Factory defaults

The factory default setting of the following features can be

predefined with OTP cells:

• Multiplication factor S[1:0] for full and partial Display

mode

• Set VPR[8:0] for full and partial Display mode

• Set bias system VB[3:0] for full and partial Display mode

• Segmented temperature compensation slopes for VLCD,

SLA[2:0], SLB[2:0], SLC[2:0] and SLD[2:0]

• Segmented temperature frame frequencies DFA[6:0],

DFB[6:0], DFC[6:0] and DFD[6:0]

• Frame frequency 8-colour mode DF8[6:0]

• TRS and BRS

• Identification bits ID2[7:0] and ID3[7:0].

It is possible to change to settings defined by registers

which can be set via the interface, except ID2[7:0] and

ID3[7:0] which are defined only by OTP cells. The

selection of the factory defaults mode is made by setting

the factory default OTP bit EFD.

The operation can be thought of as a switch that selects

between two sources for the data. When the factory

defaults are selected (EFD = 1), changing the values via

the interface is not possible, not even by sending the SFD

command.

Table 88 Factory default bit EFD

EFD

ACTION

conﬁguration data is taken from the interface if SFD = 0 or from the OTP if SFD = 1

OTP values are used for conﬁguration

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