PCF8833USLASH2DA datasheet(91/112 Pages) PHILIPS

91 / 112 page

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Notes

1. X = don’t care. For hexadecimal representation, don’t care bits are assumed to be logic 0.

2. The chip stays in shift operation as long as D/C is logic 1.

3. When VCBW = 1 the VC buffer is switched to a weak buffer. Default is VCBW = 0, where the VC buffer is powerful. To save power a capacitor could

be connected to VC pad. Depending on the application it might be advantageous or even necessary to program VCBW = 1.

wait for 50 ms until OTP cells are

programmed

111000

disable programming

ORA = 001; OPE = 0; CALMM = 1

repeat steps 10 to 13 for rows 2 to 6

111000

exit CALMM mode

ORA = 000; OPE = 0; CALMM = 0

set VOTP(gate) =0V; VOTP(drain) =0V

STEP

D/C

COMMAND BYTE(1)

ADDR

DESCRIPTION

654321

PCF8833U/2DA 数据表(PDF) 91 Page - NXP Semiconductors