PCF8833USLASH2DA datasheet(89/112 Pages) PHILIPS

89 / 112 page

2003 Feb 14

Philips Semiconductors

Objective speciﬁcation

STN RGB - 132

× 132 × 3 driver

PCF8833

15.7

Example of ﬁlling the shift register

Table 96 shows the sequence of commands to fill the OTP matrix as defined in Table 93.

Table 96 Sequence for ﬁlling the OTP matrix

Notes

1. X = don’t care. For hexadecimal representation, don’t care bits are assumed to be logic 0.

2. The chip stays in shift operation as long as D/C is logic 1.

15.8

Programming ﬂow

In order to program an OTP cell, the associated register must be set to logic 1 and a programming voltage of 8 V should

to be applied to pins VOTP(gate) and VOTP(drain) for 50 ms. It is strongly recommended to use the sequence shown in

Table 97 to program the OTP cells. In any event the requirements stated in Section 15.9 must be met.

Important: Whenever a new row in the OTP matrix is selected (change of ORA[2:0]), the OTP cells must not be

connected to pin VOTP(drain) (set OPE = 0). For an example see steps 9 to 11 in Table 97.

STEP

D/C

COMMAND BYTE(1)

ADDR

DESCRIPTION

76543210

000000001

01H

reset (may also be hardware

reset)

wait 1 ms for refresh to take

effect

011110000

F0H

enter CALMM mode

01H

ORA = 000; OPE = 0;

CALMM = 1

011110001

F1H

send OTPSHTIN; note 2

shift15

000000

00H

set PVB[3:0]; BRS and TRS

shift14

000000

00H

set FVB[3:0]; 0 and EFD

shift13

000000

00H

set PVPR[8:3]

shift12

000000

00H

set PVPR[2:0] and FVPR[8:6]

shift11

000000

00H

set FVPR[5:0]

shift10

000000

00H

set SLD[2:0] and SLC[2:0]

shift9

000000

00H

set SLB[2:0] and SLA[2:0]

shift8

000000

00H

set PS[1:0]; FS[1:0] and ID3[7:6]

shift7

0000000

00H

set ID3[5:0] and ID2[7]

shift6

0000000

00H

set ID2[6:0]

shift5

0000000

00H

set DF8[6:0]

shift4

0000000

00H

set DFD[6:0]

shift3

0000000

00H

set DFC[6:0]

shift2

0000111

07H

set DFB[6:0]

shift1

0010001

11H

set DFA[6:0]

shift0

0011010

1AH

set MMVOP[5:0] and SEAL

011110000

F0H

exit CALMM mode; if required

00H

ORA = 000; OPE = 0;

CALMM = 0

PCF8833U/2DA 数据表(PDF) 89 Page - NXP Semiconductors

PCF8833U/2DA 数据表(HTML) 89 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

PCF8833U/2DA 数据表(PDF) 89 Page - NXP Semiconductors

PCF8833U/2DA 数据表(HTML) 89 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载