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PCF8833U/2DA 数据表(PDF) 17 Page - NXP Semiconductors |
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PCF8833U/2DA 数据表(HTML) 17 Page - NXP Semiconductors |
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17 / 112 page  2003 Feb 14 17 Philips Semiconductors Objective specification STN RGB - 132 × 132 × 3 driver PCF8833 6.2.6 READ DISPLAY IDENTIFICATION INFORMATION The Read Display Identification Information (RDDIDIF) command returns a 24-bit display identification information. The identification information is valid only 5 ms after applying a hardware reset. Therefore the RDDIDIF command should not be sent earlier than 5 ms after a hardware reset. The input and output data format is given in Table 9. After the command byte 04H is sent, the read starts with one dummy clock cycle followed by the 3 status bytes (see Fig.47). When less than 25 read clock cycles are sent in Serial mode, the identification information read must be interrupted by a hardware reset or rising edge of SCE. The definition of the display identification bits is given in Table 11. Table 8 Read display identification information register bits Table 9 RDDIDIF data format for Serial mode Table 10 RDDIDIF data format for Parallel mode Table 11 Description of the display identification bits Note 1. RDID3 will be programmed in OTP cells. This ID can be set to 03H by the module maker. D/C 76543210 DEFAULT 0 00000100 04H BIT D/C 76543210 DEFAULT (S)DIN 0 0 0 0 0 0 1 0 0 04H (S)DOUT − X (only one dummy clock cycle, not a full byte) X (S)DOUT − D23 D22 D21 D20 D19 D18 D17 D16 45H − D15 D14 D13 D12 D11 D10 D9 D8 XX − D7 D6 D5 D4 D3 D2 D1 D0 XX D/C 76543210 DEFAULT 0 00000100 04H 1 XXXXXXXX XX 1 D23 D22 D21 D20 D19 D18 D17 D16 45H 1 D15 D14 D13 D12 D11 D10 D9 D8 XX 1 D7D6D5D4D3D2D1D0 XX BIT BIT DESCRIPTION RD BYTE REMARK D[23:16] manufacturer ID RDID1 hard wired = 45H D15 driver/module ID (STN B/W = 0 and STN Colour = 1) RDID2 OTP programmed; see Chapter 15 D[14:8] driver/module version ID D[7:0] driver/module code RDID3(1) OTP programmed; see Chapter 15 |
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