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PCF8833U/2DA 数据表(PDF) 88 Page - NXP Semiconductors

部件名 PCF8833U/2DA
功能描述  STN RGB - 132 X 132 X 3 driver
PDF  112 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

PCF8833U/2DA 数据表(HTML) 88 Page - NXP Semiconductors

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Table 95 Sequence to determine MMVOP
Notes
1. X = don’t care. For hexadecimal representation, don’t care bits are assumed to be logic 0.
2. D31 is the booster voltage status bit; see Section 6.2.7.
3. The chip stays in shift operation as long as D/C is logic 1.
STEP
D/C
COMMAND BYTE(1)
ADDR
DESCRIPTION
7
654321
0
1
0
0
000000
1
01H
reset (may also be hardware reset)
2
−−−−−−
wait 1 ms for refresh to take effect
3
0
1
110111
0
EEH
set SFD = 0 in order to use interface
values
4
0
0
010100
0
28H
send DISPOFF to prevent rows and
columns to toggle
5
0
1
011000
0
B0H
set VPR to desired value
1
X
XXX
VPR8
VPR7
VPR6
VPR5
1
X
X
X
VPR4
VPR3
VPR2
VPR1
VPR0
6
0
1
100001
0
C2H
set multiplication stages to desired
value
1
X
XXXXX
S1
S0
7
0
1
111000
0
F0H
enter CALMM mode
1
X
X
0
0
0
x
0
1
01H
ORA = 000 OPE = 0 CALMM = 1
8
0
0
001000
1
11H
send Sleep_OUT (no refresh
because CALMM = 1)
9
−−−−−−
wait until D31 = 1 (V stable); note 2
10
0
1
111000
1
F1H
send OTPSHTIN; note 3
1
X
MMVOP5 MMVOP4 MMVOP3 MMVOP2 MMVOP1 MMVOP0
0
set MMVOP[5:0] and SEAL = 0
11
−−−−−−
check VLCD2 after VLCD2 has settled
12
−−−−−−
repeat steps 10 to 11 until desired
VLCD2 is reached
13
0
1
111000
0
F0H
exit CALMM mode; if required
1
X
X
0
0
0
x
0
0
00H
ORA = 000 OPE = 0 CALMM = 0



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