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HMC1197LP7FE 数据表(PDF) 33 Page - Analog Devices

部件名 HMC1197LP7FE
功能描述  Fixed Wireless or WLL
PDF  57 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

HMC1197LP7FE 数据表(HTML) 33 Page - Analog Devices

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For price, delivery, and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
Phone: 978-250-3343
Fax: 978-250-3373
Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
HMC1197LP7FE
v03.0314
Wideband direct Quadrature Modulator
w/ Fractional-n Pll & Vco, 100 - 4000 MHz
33
It is also possible to leave various blocks on when in Power Down (see Reg 01h), including:
a. Internal Bias Reference Sources
Reg 01h[2]
b. PD Block
Reg 01h[3]
c. CP Block
Reg 01h[4]
d. Reference Path Buffer
Reg 01h[5]
e. VCO Path buffer
Reg 01h[6]
f. Digital I/O Test pads
Reg 01h[7]
To mute the output but leave the PLL and VCO locked please refer to 1.2.4 section.
1.6
General Purpose output (GPo) Pin
The PLL shares the LD_SDO (Lock-Detect/Serial Data Out) pin to perform various functions. While the
pin is most commonly used to read back registers from chip via the SPI, it is also capable of exporting a
variety of signals and real time test waveforms (including Lock Detect). It is driven by a tri-state CMOS
driver with ~200 Ω Rout. It has logic associated with it to dynamically select whether the driver is enabled,
and to decide which data to export from the chip.
In its default configuration, after power-on-reset, the output driver is disabled, and only drives during
appropriately addressed SPI reads. This allows it to share the output with other devices on the same bus.
The pin driver is enabled if the chip is addressed - ie. The last 3 bits of SPI cycle = ‘000’b before the
rising edge of SEN. If SEN rises before SCK has clocked in an ‘invalid’ (non-zero) chip -address, the
HMC1197LP7FE will start to drive the bus.
The WIDEBAND DIRECT QUADRATURE MODULATOR w/ Fractional- N PLL & VCO will naturally switch
away from the GPO data and export the SDO during an SPI read. To prevent this automatic data selection,
and always select the GPO signal, set “Prevent AutoMux of SDO” (Reg 0Fh[6] = 1). The phase noise
performance at this output is poor and uncharacterized. The GPO output should not be toggling during
normal operation because it may degrade the spectral performance.
Note that there are additional controls available, which may be helpful if sharing the bus with other devices:
To disable the driver completely, set Reg 08h[5] = 0 (it takes precedence over all else).
To disable either the pull-up or pull-down sections of the driver, Reg 0Fh[8] = 1 or Reg 0Fh[9] = 1
respectively.
Example Scenarios:
Drive SDO during reads, tri-state otherwise (to allow bus-sharing)
No action required.
Drive SDO during reads, Lock Detect otherwise
Set GPO Select Reg 0Fh [4:0] = ‘00001’b (which is default)
Set “Prevent GPO driver disable” (Reg 0Fh[7] = 1)
Always drive Lock Detect
Set “ Prevent AutoMux of SDO” Reg 0Fh[6] = 1
Set GPO Select Reg 0Fh[4:0]= 00001 (which is default)
Set “Prevent GPO driver disable” (Reg 0Fh[7] = 1))
The signals available on the GPO are selected in Reg 0Fh[4:0].
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc.,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
Application Support: Phone: 1-800-ANALOG-D



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