HMC1197LP7FE datasheet(48/57 Pages) AD

48 / 57 page

For price, delivery, and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824

Phone: 978-250-3343

Fax: 978-250-3373

Order On-line at www.hittite.com

Application Support: Phone: 978-250-3343 or apps@hittite.com

HMC1197LP7FE

v03.0314

Wideband direct Quadrature Modulator

w/ Fractional-n Pll & Vco, 100 - 4000 MHz

2.23

reg 17h Modes register default 1ab h

BIT

TYPE

NAME

Width

Default

DESCRIPTION

[0]

R/W

VCO SubSys Master Enable

Master enable for the entire VCO Subsystem

1 - Enable

0 - Disable

Chip Enable is also required to set as enable mode.

[1]

R/W

VCO Enable

[2]

R/W

External VCO Buffer Enable

External VCO Buffer to output stage enable. Only used when locking

an external VCO.

[3]

R/W

PLL Buffer Enable

PLL Buffer Enable. Used when using an internal VCO.

[4]

R/W

LO1 Output Buffer Enable

Enables LO1 (LO_P & LO_N pins) output buffer.

[5]

R/W

LO2 Output Buffer Enable

Enables the LO2 (LO2_N & LO2_P pins) output buffer

[6]

R/W

External Input Enable

Enables External VCO input

[7]

R/W

Pre Lock Mute Enable

Mute both output buffers until the PLL is locked

[8]

R/W

LO1 Output Single-Ended

Enable

Enables Single-Ended output mode for LO output

1- Single-ended mode, LO_N pin is enabled, and LO_P pin is

disabled

0- Differential mode, both LO_N and LO_P pins enabled

Please note that single-ended output is only available on LO_N pin.

[9]

R/W

LO2 Output Single-Ended

Enable

Enables Single-Ended output mode for LO2 output

1- Single-ended mode, LO2_N pin is enabled, and LO2_P pin is

disabled

0- Differential mode, both LO2_N and LO2_P pins enabled

Please note that single-ended output is only available on LO2_N pin.

[10]

R/W

Reserved

[11]

R/W

Charge Pump Output Select

Connects CP to CP1 or CP2 output.

0: CP1

1: CP2

[23:12]

R/W

Reserved

2.24

reg 18h bias register default 54c1 h

BIT

TYPE

NAME

Width

Default

DESCRIPTION

[18:0]

R/W

Reserved

21697d

54C1h

Reserved

[19]

R/W

External Input buffer BIAS

bit0

External Input buffer BIAS bit0

[20]

R/W

External Input buffer BIAS

bit1

External Input buffer BIAS bit1

[23:21]

R/W

Reserved

2.25

reg 19h cals register default aaa h

BIT

TYPE

NAME

Width

Default

DESCRIPTION

[23:0]

R/W

Reserved

2730d

AAAh

Reserved. Program to AB2h.

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

For price, delivery, and to place orders: Analog Devices, Inc.,

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106

Phone: 781-329-4700 • Order online at www.analog.com

Application Support: Phone: 1-800-ANALOG-D

HMC1197LP7FE 数据表(PDF) 48 Page - Analog Devices

HMC1197LP7FE 数据表(HTML) 48 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57

数据表下载

链接网址

HMC1197LP7FE 数据表(PDF) 48 Page - Analog Devices

HMC1197LP7FE 数据表(HTML) 48 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57

数据表 下载

链接网址

数据表下载