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ADP5053ACPZ-R7 数据表(PDF) 29 Page - Analog Devices

部件名 ADP5053ACPZ-R7
功能描述  Integrated Power Solution with Quad Buck
PDF  37 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5053ACPZ-R7 数据表(HTML) 29 Page - Analog Devices

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ADP5053
Data Sheet
Rev. B | Page 28 of 36
DESIGN EXAMPLE
This section provides an example of the step-by-step design
procedures and the external components required for Channel 1.
Table 13 lists the design requirements for this specific example.
Table 13. Example Design Requirements for Channel 1
Parameter
Specification
Input Voltage
VPVIN1 = 12 V ± 5%
Output Voltage
VOUT1 = 1.2 V
Output Current
IOUT1 = 4 A
Output Ripple
ΔVOUT1_RIPPLE = 12 mV in CCM mode
Load Transient
±5% at 20% to 80% load transient, 1 A/µs
Although this example shows step-by-step design procedures
for Channel 1, the procedures apply to all other buck regulator
channels (Channel 2 to Channel 4).
SETTING THESWITCHINGFREQUENCY
The first step is to determine the switching frequency for the
ADP5053 design. In general, higher switching frequencies
produce a smaller solution size due to the lower component
values required, whereas lower switching frequencies result in
higher conversion efficiency due to lower switching losses.
The switching frequency of the ADP5053 can be set to a value
from 250 kHz to 1.4 MHz by connecting a resistor from the RT
pin to ground. The selected resistor allows the user to make
decisions based on the trade-off between efficiency and solution
size. (For more information,see the Oscillatorsection.) However,
the highest supported switching frequency must be assessed by
checking the voltage conversion limitations enforced by the
minimum on time and the minimum off time (see the Voltage
Conversion Limitations section).
In this design example, a switching frequency of 600 kHz
achieves a good combination of small solution size and high
conversion efficiency. To set the switching frequency to
600 kHz, use the following equation to calculate the resistor
value, RRT:
RRT (kΩ) = [14,822/fSW (kHz)]1.081
Therefore, select standard resistor RRT = 31.6 kΩ.
SETTING THEOUTPUTVOLTAGE
Select a 10 kΩ bottom resistor (RBOT) and then calculate the top
feedback resistor using the following equation:
RBOT = RTOP × (VREF/(VOUT − VREF))
where:
VREF is 0.8 V for Channel 1.
VOUT is the output voltage.
To set the output voltage to 1.2 V, choose the following resistor
values: RTOP = 4.99 kΩ and RBOT = 10 kΩ.
SETTING THECURRENT LIMIT
For 4 A output current operation, the typical peak current limit
is 6.44 A. For this example, choose RILIM1 = 22 kΩ (see Table 10).
For more information,see the Current-Limit Protectionsection.
SELECTING THEINDUCTOR
The peak-to-peak inductor ripple current, ΔIL, is set to 35% of
the maximum output current. Use the following equation to
estimate the value of the inductor:
L = [(VIN − VOUT) × D]/(ΔIL × fSW)
where:
VIN = 12 V.
VOUT = 1.2 V.
D is the duty cycle (D = VOUT/VIN = 0.1).
ΔIL = 35% × 4 A = 1.4 A.
fSW = 600 kHz.
The resulting value for L is 1.28 µH. The closest standard
inductor value is 1.5 µH; therefore, the inductor ripple current,
ΔIL, is 1.2 A.
The peak inductor current is calculated using the following
equation:
IPEAK = IOUT + (ΔIL/2)
The calculated peak current for the inductor is 4.6 A.
Calculate the rms current of the inductor using the following
equation:
12
2
2
L
OUT
RMS
I
I
I
+
=
The rms current of the inductor is approximately 4.02 A.
Therefore, an inductor with a minimum rms current rating of
4.02 A and a minimum saturation current rating of 4.6 A is
required. However, to prevent the inductor from reaching its
saturation point in current-limit conditions, it is recommended
that the inductor saturation current be higher than the maximum
peak current limit, typically 7.48 A, for reliable operation.
Based on these requirements and recommendations, the TOKO
FDV0530-1R5inductor,with a DCR of 13.5mΩ,is selected for this
design.



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