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ADP5053ACPZ-R7 数据表(PDF) 32 Page - Analog Devices |
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ADP5053ACPZ-R7 数据表(HTML) 32 Page - Analog Devices |
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32 / 37 page ![]() Data Sheet ADP5053 Rev. B | Page 31 of 36 CIRCUIT BOARD LAYOUT RECOMMENDATIONS Effective circuit board layout is essential to obtain the best performance from the ADP5053 (see Figure 51). Poor layout can affect the regulation and stability of the device, as well as the electromagnetic interference (EMI) and electromagnetic compatibility (EMC) performance. Refer to the following guidelines for the most effective PCB layout. • Place the input capacitor, inductor, MOSFET, output capacitor, and bootstrap capacitor near to the IC. • Use short, thick traces to connect the input capacitors to the PVINx pins, and use dedicated power ground to connect the input and output capacitor grounds to minimize the connection length. • Use several high current vias, if required, to connect PVINx, PGNDx, and SWx to other power planes. • Use short, thick traces to connect the inductors to the SWx pins and the output capacitors. • Ensure that the high currentloop traces are as short and wide as possible. Figure 50 shows the high current path. • Maximize the amount of ground metal for the exposed pad, and use as many vias as possible on the component side to improve thermal dissipation. • Use a ground plane with several vias connected to the component side ground to further reduce noise interference on sensitive circuit nodes. • Place the decoupling capacitors near to the VREG and VDD pins. • Place the frequency setting resistor near to the RT pin. • Place the feedback resistor divider near to the FBx pin. In addition, keep the FBx traces away from the high current traces and the switch node to avoid noise pickup. • Use 0402 or 0603 size resistors and capacitors to achieve the smallest possible footprint solution on boards where space is limited. VIN VOUT PVINx ENx PGND BSTx SWx ADP5053 DLx FBx Figure 50. Typical Circuit with High Current Traces Shown in Gray ADP5053 ADP5053 L3 L4 DUAL MOSFET VOUT4 VOUT3 VOUT2 VOUT1 Figure 51. Typical PCB Layout |
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