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ADP5053ACPZ-R7 数据表(PDF) 36 Page - Analog Devices

部件名 ADP5053ACPZ-R7
功能描述  Integrated Power Solution with Quad Buck
PDF  37 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5053ACPZ-R7 数据表(HTML) 36 Page - Analog Devices

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Data Sheet
ADP5053
Rev. B | Page 35 of 36
FACTORY DEFAULT OPTIONS
Table 16 lists the factory default options programmed into the ADP5053 when the device is ordered (see the Ordering Guide). To order
the device with options other than the default options, contact your local Analog Devices sales or distribution representative.
Table 16. Factory Default Options
Option
Default Value
Channel 1 Output Voltage
0.8 V adjustable output
Channel 2 Output Voltage
0.8 V adjustable output
Channel 3 Output Voltage
0.8 V adjustable output
Channel 4 Output Voltage
0.8 V adjustable output
PWRGD Pin (Pin 20) Output
Monitor Channel 1 output
Output Discharge Function
Enabled for all four buck regulators
Switching Frequency on Channel 1
1 × switching frequency set by the RT pin
Switching Frequency on Channel 3
1 × switching frequency set by the RT pin
SYNC/MODE Pin (Pin 43) Function
Forced PWM/automatic PWM/PSM mode setting with the ability to
synchronize to an external clock
Hiccup Protection
Enabled for overcurrent events
Short-Circuit Latch-Off Function
Disabled for output short-circuit events
Overvoltage Latch-Off Function
Disabled for output overvoltage events
Reset Timeout Period
200 ms
Watchdog Timeout Period
1.6 sec
Manual Reset Input Mode
Processor manual reset mode



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