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IOBUS0 数据表(PDF) 34 Page - Future Technology Devices International Ltd. |
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IOBUS0 数据表(HTML) 34 Page - Future Technology Devices International Ltd. |
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34 / 88 page  34 C opyright © Future T ec hnology Devic es I nternational Limited Datasheet Vinculum-II Embedded Dual USB Host Controller IC V ers ion 1 .7 Doc ument N o.: FT _000138 C learance N o.: FT DI# 1 43 5.6 I/O Mux Group 3 Available Input signals Available output signals 64 Pin Package Available pins 48 Pin Package Available pins 32 Pin Package Available pins uart_cts# uart_ri# fifo_data[3] fifo_data[7] fifo_wr# spi_s0_ss# spi_s1_ss# gpio[A3] gpio[A7] gpio[B3] gpio[B7] gpio[C3] gpio[C7] gpio[D3] gpio[D7] gpio[E3] gpio[E7] fifo_data[3] fifo_data[7] pwm[3] pwm[7] spi_m_ss_0# gpio[A3] gpio[A7] gpio[B3] gpio[B7] gpio[C3] gpio[C7] gpio[D3] gpio[D7] gpio[E3] gpio[E7] 14, 18, 23, 27, 32, 42, 46, 50, 56, 60, 64 14, 19, 23, 34, 38, 44, 48 15, 26, 32 Table 5.5 Group 3 Table 5.5 - Input and output signals that are available for all the IOBUS pins that are in group 3. For example if you using the 48 pin package device this would allow pins 14, 19, 23, 34, 38, 44 and 48 to be configured as either an input signal (listed in the first column) or a output signal (listed in the second column). |
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