IOBUS0 datasheet(49/88 Pages) FTDI

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Datasheet

Vinculum-II Embedded Dual USB Host Controller IC

V ers ion 1 .7

Doc ument N o.: FT _000138 C learance N o.: FT DI# 1 43

The command and status formats for this mode can be seen in Figure 6.15 below with a description of

each field in Table 6.7.

Command:

Data:

Status:

Figure 6.15 VNC1L Compatible SPI Command and Status Structure

Field

Description

Start

Driven to ‘1’.

R/W

If set to ‘1’, the SPI Master wishes to read from the slave. If set to ‘0’, the SPI Master wishes to

write to the slave.

Addr

If set to ‘1’, a read operation will return the status byte in the data phase. A write will have no

effect.

If set to ‘0’, a read or a write will operate on the data register.

D7:D0

Data.

Status

When ‘0’ this means a read or write was successful. When ‘1’ it means a re ad contains old data,

or a write did not work and needs retried.

Table 6.7 SPI Command and Status Fields

6.3.6.1 SPI Setup Bit Encoding

The VNC1L compatible SPI interface differs from most other implementations in that it uses a 12 clock

sequence to transfer a single byte of data. In addition to a ‘Start’ state, the SPI master must send two

setup bits which indicate data direction and target address. The encoding of the setup bits is shown in

Table 6.8. A single data byte is transmitted in each SPI transaction, with the most significant bit

transmitted first.

After each transaction VNC2 returns a single status bit. This indicates if a Data Write was successful or a

Data Read was valid.

Direction

(R/W)

Target

Address

Operation

Meaning

Data Read

Retrieve byte from Transmit Buffer

Status Read

Read SPI Interface Status

Data Write

Add byte to Receive Buffer

N/A

Table 6.8 SPI Setup Bit Encoding

Start

R/W

Addr

Status

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