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IOBUS0 数据表(PDF) 55 Page - Future Technology Devices International Ltd. |
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IOBUS0 数据表(HTML) 55 Page - Future Technology Devices International Ltd. |
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55 / 88 page ![]() 55 C opyright © Future T ec hnology Devic es I nternational Limited Datasheet Vinculum-II Embedded Dual USB Host Controller IC V ers ion 1 .7 Doc ument N o.: FT _000138 C learance N o.: FT DI# 1 43 Figure 6.21 Typical SPI Master Timing Table 6.14 SPI Master Timing Time Description Minimum Typical Maximum Unit t1 SCLK period 39.68 41.67 ns t2 SCLK high period 19.84 20.84 21.93 ns t3 SCLK low period 19.84 20.84 21.93 ns t4 SCLK driving edge to MOSI/SS -1.5 3 ns t5 MISO setup time to sample SCLK edge 6.5 ns t6 MISO hold time from sample SCLK edge 0 ns |
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