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TNETX15AE 数据表(PDF) 65 Page - Texas Instruments

部件名 TNETX15AE
功能描述  ADDRESS-LOOKUP DEVICE
PDF  78 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TNETX15AE 数据表(HTML) 65 Page - Texas Instruments

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TNETX15AE
ADDRESS-LOOKUP DEVICE
SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997
65
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
IOH = rated
VCC–0.6
V
VOL
Low-level output voltage
IOL = rated
0.4
V
IOZ
High impedance state output current
VO = VCC
20
µA
IOZ
High-impedance-state output current
VO = 0
–20
µA
IIH
High-level input current
VI = VI(MAX)
–20
µA
IIL
Low-level input current
VI = GND
20
µA
ICC
Supply current, 3.3 V
75
mA
ICC(5V)
Supply current, 5 V
2
mA
timing requirements over recommended operating conditions (see Figure 18)
external SRAM read cycle
NO.
MIN
MAX
UNIT
1
tc(R)
Cycle time, read
40
ns
2
tsu(ED) Setup time, ED15–ED0 valid before OSCIN↑
10
ns
3
th(ED)
Hold time, ED15–ED0 valid after OSCIN
↑
2
ns
operating characteristics over recommended operating conditions (see Figure 18)
external SRAM read cycle
NO.
PARAMETER
MIN
MAX
UNIT
4
td(EA)1
Delay time, from OSCIN
↑ to EA20–EA0 valid
2
17
ns
5
td(EOE)1
Delay time, from OSCIN
↓ to EOE↓
13
ns
6
td(EOE)2
Delay time, from OSCIN
↑ to EOE↑
2
12
ns
7
td(EA)2
Delay time, from EOE
↑ to EA20–EA0 valid
–2
ns
4+2
td(EA)1 + tsu(ED) Delay time, total for same device
24
ns
Z
5
1
6
Z
3
EA20–EA0
(Output)
EWE
(Output)
EOE
(Output)
ED15–ED0
(Input)
OSCIN
(Input)
2
Valid
4
4
Valid
Valid
7
Figure 18. External SRAM Read Cycle



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