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TNETX15AE 数据表(PDF) 74 Page - Texas Instruments |
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TNETX15AE 数据表(HTML) 74 Page - Texas Instruments |
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74 / 78 page  TNETX15AE ADDRESS-LOOKUP DEVICE SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997 74 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION Outputs are driven to a minimum high-logic level of 2.4 V and to a maximum low-logic level of 0.6 V. These levels are compatible with TTL devices. Output transition times are specified as follows: all transition times are measured at the point where the output signal crosses 1.3 V. The rise and fall times are not specified but are assumed to be those of standard TTL devices, which are typically 1.5 ns. 1.3 V test measurement The test-load circuit shown in Figure 27 represents the programmable load of the tester pin electronics that is used to verify timing parameters of the TNETX15VE output signals. OUTPUT TEST LOAD CL IOH VLOAD IOL Test Point Output Under Test Where: IOH = refer to IOH in recommended operating conditions IOL = refer to IOL in recommended operating conditions VLOAD = 1.5 V, typical CL = 25 pF, typical load-circuit capacitance Figure 27. Test and Load Circuit |
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