TNETX15AE datasheet(20/78 Pages) TI

20 / 78 page

TNETX15AE

ADDRESS-LOOKUP DEVICE

SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

mode control status register, control at 0x08–0x09 (DIO) (continued)

BIT

NAME

FUNCTION

RESET

Reset. Writing a 1 to RESET places the TNETX15AE in a hardware reset state. This function sets all internal logic

operations to a known state, and clears all registers (except for control). (All data from the lookup table is lost.) This bit

is not automatically loaded from the EEPROM. If EEPROM automatic loading fails, then the RESET bit is set to 1.

LOAD

Load system. Writing a 1 to LOAD starts the automatic loading of registers from the attached EEPROM. This bit is not

automatically loaded from the EEPROM. The EEPROM automatic loader clears this bit to 0 (writing a 0 to this bit has

no effect). This is another way to initialize registers besides the auto-load (if EEPROM present) after reset.

START

Start system. Writing a 1 to START causes the TNETX15AE to begin operation. While the SRAM tables are initialized,

no address checking is performed. (Writing a 0 to this bit has no effect.)

INITD

RAM-initialization-done signal. INITD becomes high when the lookup table SRAM is initialized. The TNETX15AE begins

learning/matching addresses after this signal goes high. This is a read-only bit. Expect this to take 40 ns

× RAMsize.

NEEPM

No external EEPROM. NEEPM indicates when an internal EEPROM is detected. If this bit is 1, no EEPROM is present

or the TNETX15AE is unable to detect it, or the CRC is wrong. If this bit is set to 0, a properly formatted EEPROM was

detected. This is a read-only bit.

NAUTO

Not automatically add-address mode select. NAUTO selects the manner in which addresses are added to the lookup

table. In NAUTO mode, the aging logic operation is disabled. It is management’s responsibility to manage the lookup

table in this mode.

– When set to 1, the TNETX15AE adds addresses only to the lookup table when a DIO ADD command is given

to it. The bus watcher/LKUP state machines are still watching source addresses, and the NEW int is issued if a

new address is observed on the wire.

– When set to 0, the TNETX15AE automatically adds unknown addresses to its lookup table.

9–7

Reserved

Cleared to 0 on reset. Must always be written with a 0, even via EEPROM load.

NLRN0

Not-learn addresses from port 0. When set, the TNETX15AE does not learn SRC addresses on port 0 (uplink).

NCRC

No CRC check. NCRC enables/disables the add-on-only-good CRC function.

– When set to a 1, the TNETX15AE adds frames immediately after the source address is found on the DRAM bus.

A good CRC is not required to add the source address to the table.

– When set to a 0, the TNETX15AE waits until the EOB/EOF and a good CRC indication before adding addresses.

Only one source address add can be pending at a time. Waiting on a good CRC can force the TNETX15AE to miss

adds on other ports.

4–0

Reserved

Writes to these locations are ignored and read as 0.

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