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TNETX15AE 数据表(PDF) 9 Page - Texas Instruments |
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TNETX15AE 数据表(HTML) 9 Page - Texas Instruments |
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9 / 78 page  TNETX15AE ADDRESS-LOOKUP DEVICE SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions (Continued) DIO interface-statistics TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION EINT 112 0 TNETX15AE interrupt. EINT is an interrupt request from the TNETX15AE to an optional attached microprocessor. Its purpose is to reduce the polling that is required for the processor to be current on the operational states of the TNETX15AE. The interrupt cause is determined by reading the interrupt register (0x28, 0x29). It is not required to acknowledge or act on the interrupts (unmanaged operation). EINT is active high and level sensitive; it is high when any of the interrupt triggers are active. ESCS 86 I TNETX15AE chip select. When ESCS is active (low), a port access is valid for the TNETX15AE device. ESCS must not be tied to any other chip-select signal (such as the TNETX3150/TNETX3150A SCS or the TNETX3100 SCS). SAD1 SAD0 85 84 I DIO address bus. SAD1–SAD0 selects the TNETX15AE host registers. SAD1 SAD0 Description 0 0 DIO address low 0 1 DIO address high 1 0 DIO data 1 1 DIO data auto increment SDATA7† SDATA6 SDATA5 SDATA4 SDATA3 SDATA2 SDATA1 SDATA0‡ 81 80 79 78 76 75 74 73 I/O DIO data bus. SDATA7–SDATA0 is a byte-wide bidirectional DIO bus. SRDY 88 O DIO ready. When SRDY is active low, the following conditions occur: – When SRNW = 1, the interface host is told that data is valid for reading by the host. – When SRNW = 0, the interface host is told that data has been received by the TNETX15AE. When ESCS is inactive high, SRDY is disabled [high-impedance (Z) state]. SRNW 83 I DIO read/not write. SRNW is a read- or write-select signal. – When SRNW is high, the read operation is performed by the host. – When SRNW is low, the write operation is performed by the host. † Most-significant bit ‡ Least-significant bit DIO interface-MII TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION MDCLK 113 O MII management data clock. MDCLK is a clock from the TNETX15AE for the serial MII management data MDIO. MDCLK can be disabled [high-impedance (Z) state] by MDIOEN [a bit in the SIO register at 0x0A (DIO)]. MDIO 109 I/O MII management data input/output. MDIO is the data terminal for serial MII management data. MDIO requires an external pullup resistor for proper operation. MDIO can be disabled [high-impedance (Z) state] by MDIOEN [a bit in the SIO register at 0x0A (DIO)]. MRESET 114 O MII management reset. MRESET is a reset signal for the serial MII management interface. MRESET can be disabled [high-impedance (Z) state] by MDIOEN [a bit in the SIO register at 0x0A (DIO)]. |
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