TNETX15AE datasheet(12/78 Pages) TI

12 / 78 page

TNETX15AE

ADDRESS-LOOKUP DEVICE

SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

DIO register access (continued)

To access an internal register, post both halves of the address to the DIO address-low and DIO address-high

registers and read or write the DIO data register. The DIO access register code is given in Table 1. If the host

performs a read, the internal state machine enables the internal register at the posted address to drive the bus

when the read cycle is active. If the host performs a write to a TNETX15AE register, the value written to the data

SRDY (on a host read) indicates that the internal fetch was accomplished. A delay of up to 60 ns after cycle start

is encountered if the resource being requested is currently being used by an internal state machine. There are

dedicated cycles for DIO to prevent lockout, but they are allocated as 2 of 5, and DIO is asynchronous to internal

processes. SRDY (on a host write) indicates that the value written to the data register is captured and is written

to the resource addressed. For maximum throughput, SRDY should be part of the interface; if not, add 60 ns

to the minimum DIO cycle times.

If a range of consecutive (rising in order) accesses is needed, reading or writing to the DIO data auto-increment

Reads and writes can be mixed in a string of accesses; the post increment is by one after each cycle.

All registers are set to their default values on a hardware reset (setting the RESET terminal low, then high). All

registers, except the control register, also are set to their default values on a software reset (setting the RESET

bit high in the control register).

Table 1. DIO Access Register Code

SAD1

SAD0

DESCRIPTION

DIO address low

DIO address high

DIO Data

DIO data auto-increment

DIO address register DIOADR at SAD1–SAD0 = 00b and 01b (host)

DIO ADDRESS HIGH

DIO ADDRESS LOW

15†

0‡

DIOADR

† Most-significant bit

‡ Least-significant bit

BIT

NAME

FUNCTION

15–0

DIOADR

DIO address. DIOADR contains the internal DIO address used on subsequent accesses to the DIO data or DIO data

auto-increment registers. This field auto-increments (by one) on all accesses to the DIO data auto-increment register.

DIO data register DIODATA at SAD1–SAD0 = 10b (DIO)

The DIO data register address allows indirect access to internal TNETX15AE registers. This is a temporary

staging register for data being written through to an internal register (write) or fetched from an internal

DIO address auto-increment register DIOADDRINC at SAD1–SAD0 = 11b (DIO)

The DIO address auto-increment register address allows indirect access to internal TNETX15AE registers. This

is a temporary staging register for data being written through to an internal register (write) or fetched from an

internal register (read). Accesses to this register cause a post increment of the DIO address register.

TNETX15AE 数据表(PDF) 12 Page - Texas Instruments

TNETX15AE 数据表(HTML) 12 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78

数据表下载