数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

AD6650/PCB 数据表(PDF) 12 Page - Analog Devices

部件名 AD6650/PCB
功能描述  GSM/EDGE Narrow-Band Receiver
PDF  45 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD6650/PCB 数据表(HTML) 12 Page - Analog Devices

Back Button AD6650/PCB Datasheet HTML 8Page - Analog Devices AD6650/PCB Datasheet HTML 9Page - Analog Devices AD6650/PCB Datasheet HTML 10Page - Analog Devices AD6650/PCB Datasheet HTML 11Page - Analog Devices AD6650/PCB Datasheet HTML 12Page - Analog Devices AD6650/PCB Datasheet HTML 13Page - Analog Devices AD6650/PCB Datasheet HTML 14Page - Analog Devices AD6650/PCB Datasheet HTML 15Page - Analog Devices AD6650/PCB Datasheet HTML 16Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 45 page
background image
AD6650
Rev. A | Page 11 of 44
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
A
B
C
D
E
F
G
H
J
K
L
2
4 5 6
9 10 11
3
7 8
1
AD6650
TOP VIEW
(Not to Scale)
A1 CORNER
INDEX AREA
Figure 14. Pin Configuration
Table 8. Pin Configuration
1
2
3
4
5
6
7
8
9
10
11
A
DGND
TDI
TMS
TRST
RESET
DNC
AVDD
CLK
CLK
AGND
AGND
A
B
SDFS
SCLK
TDO
TCLK
SYNC
DNC
AVDD
AVDD
AGND
AGND
BIN
B
C
SDO1
SDO0
DVDD
DVDD
DVDD
DVDD
AVDD
AVDD
AGND
AGND
BIN
C
D
D7
DR
DVDD
DGND
DGND
DGND
AVDD
AVDD
AGND
AGND
AGND
D
E
D5
D6
DVDD
DGND
DGND
DGND
AVDD
AVDD
AGND
AGND
LF
E
F
D3
D4
DVDD
DGND
DGND
DGND
AVDD
AVDD
AGND
DNC
VLDO
F
G
D1
D2
DVDD
DGND
DGND
DGND
AVDD
AVDD
AGND
AGND
CPOUT
G
H
DS (RD)
D0
DVDD
DGND
DGND
DGND
AVDD
AVDD
AGND
AGND
AGND
H
J
R/W (WR)
DTACK (RDY)
DVDD
DVDD
DVDD
DVDD
AVDD
AVDD
AGND
AGND
AIN
J
K
A2
A1
CS
MODE1
CHIP_ID1
DNC
AVDD
REFGND
REFT
AGND
AIN
K
L
DGND
A0
MODE2
MODE0
CHIP_ID0
DNC
AVDD
VREF
REFB
AGND
AGND
L
1
2
3
4
5
6
7
8
9
10
11
Table 9. Pin Function Descriptions
Mnemonic
Type
Description
No. of Pins
POWER SUPPLY
DVDD
Power
3.3 V Digital Supply.
13
AVDD
Power
3.3 V Analog Supply.
19
DGND
Ground
Digital Ground.
17
AGND
Ground
Analog Ground.
22
DIGITAL INPUTS
RESET
Input
Active Low Reset Pin.
1
SYNC
Input
Synchronizes Digital Filters.
1
CHIP_ID[1:0]
Input
Chip ID.
2
SERIAL DATA PORT
SCLK
Bidirectional
Serial Clock.
1
SDFS
Bidirectional
Serial Data Frame Sync.
1
SDO[1:0]
Output
Serial Data Outputs. Three-stated when inactive.
2
DR
Output
Output Data Ready Indicator.
1
MICROPORTCONTROL
D[7:0]
Bidirectional
Microport Data.
8
A[2:0]
Input
Microport Address Bits.
3
CS
Input
Chip Select.
1
DS (RD)
Input
Active Low Data Strobe (Active Low Read).
1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com