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STV3550 数据表(PDF) 101 Page - STMicroelectronics

部件名 STV3550
功能描述  LCD and Matrix Display TV Processor
PDF  144 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STV3550 数据表(HTML) 101 Page - STMicroelectronics

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At a CPU clock frequency of 40 MHz, the following baud rates are generated as shown in Table 23.
Note:
The reload value must be greater than zero and it will also have a minimum value (i.e. maximum
frequency) which is related to the CPU clock frequency. In normal mode this should be a minimum
of 0x0008. In I²C mode it is the sum of the settings of the data_hold constant and the data_setup
constant. i.e. 21 + 18 = 0x0027 at 60 MHz or 7 + 6 = 0x000D at 20 MHz (see Table 25).
The value in SSCBRG is used to load a counter at the start of each clock cycle. The counter counts
down until it reaches 1 and then flips the clock to the opposite logic value. Consequently, the clock
produced is twice the SSCBRG number of CPU clock cycles.
Reading the SSCBRG register will return the current count value. This can be used to determine
how far into each half cycle the counter is.
7.7.6
Shift Register
The shift register is loaded at the start of a data frame with the data in the transmit buffer. It then
shifts data out of the serial_data_out port and data in from the serial_data_in port.
The shift register can shift out LSB first or MSB first. This is programmed by the heading control bit,
SSCHB in the control register. A logic 1 indicates that the MSB will be shifted out first and a logic 0
that the LSB will shift first.
The width of a data frame is also programmable from 2 bits to 16 bits. This is set by the SSCBM bit
field of the control register. A value of “0000” is not allowed, subsequent values set the bit width to
the value plus one e.g. “0001” sets the frame width to 2 bits and “1111” sets it to 16 bits.
When shifting LSB first, data comes into the shift register at the MSB of the programmed frame
width and is taken out of the LSB of the register. When shifting in MSB first, data is placed into the
Table 23: Baud Rates and Bit Times for Various SSCBRG Reload Values
Baud Rate
Bit Time
Reload Value
Reserved. Use a
reload value > 0
-
0000H
5 MBaud
200 ns
0004H
3.3 MBaud
300 ns
0006H
2.5 MBaud
400 ns
0008H
2.0 MBaud
500 ns
000AH
1.0 MBaud
1 us
0014H
100 KBaud
10 us
00C8H
10 KBaud
100 us
07D0H
1.0 KBaud
1 ms
4E20H



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