EDBA164B4PR-1DATF-R datasheet(80/152 Pages) MICRON

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Figure 52: Temperature Sensor Timing

Host MR4 READ

Device

Temp

Margin

MR4

Trip Level

2°C

MR4 = 0x03

MRR MR4 = 0x03

MRR MR4 = 0x86

tTSI

< (tTSI + ReadInterval + SysRespDelay)

ReadInterval

SysRespDelay

MR4 = 0x86

MR4 = 0x06

Time

Temp

TempGradient

Temperture sensor update

DQ Calibration

The mobile LPDDR2 device features a DQ calibration function that outputs one of two

predefined system timing calibration patterns. For a x16 device, pattern A (MRR to

MRR32), and pattern B (MRR to MRR40), will return the specified pattern on DQ0 and

DQ8; a x32 device returns the specified pattern on DQ0, DQ8, DQ16, and DQ24.

For a x16 device, DQ[7:1] and DQ[15:9] drive the same information as DQ0 during the

MRR burst. For a x32 device, DQ[7:1], DQ[15:9], DQ[23:17], and DQ[31:25] drive the

same information as DQ0 during the MRR burst. MRR DQ calibration commands can

occur only in the idle state.

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

MODE REGISTER READ

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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