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EDBA164B4PR-1DATF-R 数据表(PDF) 35 Page - Micron Technology

部件名 EDBA164B4PR-1DATF-R
功能描述  216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM Features
PDF  152 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  MICRON [Micron Technology]
网页  http://www.micron.com
标志 MICRON - Micron Technology

EDBA164B4PR-1DATF-R 数据表(HTML) 35 Page - Micron Technology

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Table 17: Burst Sequence by Burst Length (BL), Burst Type (BT), and Wrap Control (WC) (Continued)
Notes 1–5 apply to all parameters and conditions
BL
BT
C3
C2
C1
C0
WC
Burst Cycle Number and Burst Address Sequence
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
16
Seq
0b
0b
0b
0b
Wrap
0123456789
A
B
C
D
E
F
0b
0b
1b
0b
23456789
A
B
C
D
E
F
01
0b
1b
0b
0b
456789
A
B
C
D
E
F
0123
0b
1b
1b
0b
6789
A
B
C
D
E
F
012345
1b
0b
0b
0b
89
A
B
C
D
E
F
01234567
1b
0b
1b
0b
A
B
C
D
E
F
0123456789
1b
1b
0b
0b
C
D
E
F
0123456789
A
B
1b
1b
1b
0b
E
F
0123456789
A
B
C
D
Int
X
X
X
0b
Illegal (not supported)
Any
X
X
X
0b
No
wrap
Illegal (not supported)
Notes:
1. C0 input is not present on CA bus. It is implied zero.
2. For BL = 4, the burst address represents C[1:0].
3. For BL = 8, the burst address represents C[2:0].
4. For BL = 16, the burst address represents C[3:0].
5. For no-wrap, BL4, the burst must not cross the page boundary or the sub-page boun-
dary. The variable y can start at any address with C0 equal to 0, but must not start at any
address shown in the following table.
Table 18: No-Wrap Restrictions
Width
64Mb
128Mb/256Mb
512Mb/1Gb/2Gb
4Gb/8Gb
Cannot cross full-page boundary
x16
FE, FF, 00, 01
1FE, 1FF, 000, 001
3FE, 3FF, 000, 001
7FE, 7FF, 000, 001
x32
7E, 7F, 00, 01
FE, FF, 00, 01
1FE, 1FF, 000, 001
3FE, 3FF, 000, 001
Cannot cross sub-page boundary
x16
7E, 7F, 80, 81
0FE, 0FF, 100, 101
1FE, 1FF, 200, 201
3FE, 3FF, 400, 401
x32
None
None
None
None
Note:
1. No-wrap BL = 4 data orders shown are prohibited.
Table 19: MR2 Device Feature 2 (MA[7:0] = 02h)
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
RFU
RL and WL
216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM
Mode Register Definition
09005aef85eb530a
216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN
35
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2014 Micron Technology, Inc. All rights reserved.



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