EDBA164B4PR-1DATF-R datasheet(11/152 Pages) MICRON

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Table 4: IDD Specifications – Dual Die, Dual Channel (Continued)

VDD2, VDDQ = 1.14–1.30V; VDD1 = 1.70–1.95V; TC = –40°C to +85°C

Symbol

Supply

Speed

Unit

Parameter/Condition

1066

IDD3N1

VDD1

2.4

All devices in active non power-down standby current

tCK = tCK(avg) MIN; CKE is HIGH;

CS_n is HIGH; One bank active;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE

IDD3N2

VDDQVDDQ

IDD3NS1

VDD1

2.4

All devices in active non power-down standby current

with clock stop

CK_t = LOW, CK_c = HIGH; CKE is HIGH;

CS_n is HIGH; One bank is active;

CA bus inputs are STABLE;

Data bus inputs are STABLE

IDD3NS2

VDDQVDDQ

IDD4R1

VDD1

All devices in operating burst read

tCK = tCK(avg) MIN;

CS_n is HIGH between valid commands;

One bank is active; BL = 4; RL = RL (MIN);

CA bus inputs are SWITCHING;

50% data change occurs at each burst transfer

IDD4R2

VDDQVDDQ

840

IDD4W1

VDD1

All devices in operating burst write

tCK = tCK(avg) MIN;

CS_n is HIGH between valid commands;

One bank is active; BL = 4; WL = WL (MIN);

CA bus inputs are SWITCHING;

50% data change occurs at each burst transfer

IDD4W2

VDDQVDDQ

300

IDD51

VDD1

All devices in all bank auto-refresh

tCK = tCK(avg) MIN;

CKE is HIGH between valid commands;

tRC = tRFCab (MIN); Burst refresh;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE

IDD52

VDDQVDDQ

240

IDD5AB1

VDD1

All devices in all bank auto-refresh

tCK = tCK(avg) MIN;

CKE is HIGH between valid commands;

tRC = tREFI;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE

IDD5AB2

VDDQVDDQ

IDD5PB1

VDD1

All devices in per bank auto-refresh

tCK = tCK(avg) MIN;

CKE is HIGH between valid commands;

tRC = tREFIpb;

CA bus inputs are SWITCHING;

Data bus inputs are STABLE

IDD5PB2

VDDQVDDQ

Notes:

1. Published IDD values are the maximum of the distribution of the arithmetic mean.

2. IDD current specifications are tested after the device is properly initialized.

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

IDD Specifications

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

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