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SPC58ECX 数据表(PDF) 53 Page - STMicroelectronics |
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SPC58ECX 数据表(HTML) 53 Page - STMicroelectronics |
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53 / 153 page ![]() DS11620 Rev 8 53/153 SPC584Cx, SPC58ECx Electrical characteristics 55 4.12.3 SAR ADC 10-bit electrical specification The ADC comparators are 10-bit Successive Approximation Register analog-to-digital converters with full capacitive DAC. The SARn architecture allows input channel multiplexing. Note: The functional operating conditions are given in the DC electrical specifications. Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. Stress beyond the listed maximum may affect device reliability or cause permanent damage to the device. 7. TUE is granted with injection current within the range defined in Table 26, for parameters classified as T and D. 8. DNL is granted with injection current within the range defined in Table 26, for parameters classified as T and D. Table 28. ADC-Comparator electrical specification Symbol C Parameter Conditions Value Unit Min Max fADCK SR P Clock frequency Standard frequency mode 7.5 13.33 MHz T High frequency mode >13.33 16.0 tADCINIT SR — ADC initialization time — 1.5 — µs tADCBIASINIT SR — ADC BIAS initialization time —5 — µs tADCINITSBY SR — ADC initialization time in standby Standby Mode 8 — µs tADCPRECH SR T ADC precharge time Fast channel 1/fADCK — µs Standard channel 2/fADCK — ΔVPRECH SR D Precharge voltage precision TJ < 150 °C 0 0.25 V tADCSAMPLE SR P ADC sample time(1) 10-bit ADC mode, Fast channel 5/fADCK(2) —µs 10-bit ADC mode, Standard channel 6/fADCK —µs tADCEVAL SR P ADC evaluation time 10-bit ADC mode 10/fADCK — µs D ADC comparator mode 2/fADCK — IADCREFH(3),(4) CC T ADC high reference current Run mode (average across all codes) —7 µA Power Down mode — 1 ADC comparator mode — 19.5 IADCREFL(5) CC D ADC low reference current Run mode VDD_HV_ADR_S ≤ 5.5 V —15 µA Power Down mode VDD_HV_ADR_S ≤ 5.5 V —1 ADC comparator mode — 20.5 |
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