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SPC58ECX 数据表(PDF) 18 Page - STMicroelectronics |
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SPC58ECX 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 153 page ![]() Electrical characteristics SPC584Cx, SPC58ECx 18/153 DS11620 Rev 8 VSS_HV_ADR_S- VSS_HV_ADV SR D VSS_HV_ADR_S differential voltage — –25 — 25 mV VRAMP_HV SR D Slew rate on HV power supply —— — 100 V/ms VIN SR P I/O input voltage range —0 — 5.5 V IINJ1 SR T Injection current (per pin) without performance degradation(8) (9) (10) Digital pins and analog pins –3.0 — 3.0 mA IINJ2 SR D Dynamic Injection current (per pin) with performance degradation(10) (11) Digital pins and analog pins –10 — 10 mA 1. The ranges in this table are design targets and actual data may vary in the given range. 2. The maximum number of PRAM wait states has to be configured accordingly to the system clock frequency. Refer to Table 6 . 3. Maximum operating frequency is applicable to the cores and platform of the device. See the Clock Chapter in the Microcontroller Reference Manual for more information on the clock limitations for the various IP blocks on the device. 4. In order to evaluate the actual difference between ambient and junction temperatures in the application, refer to Section 5.6: Package thermal characteristics . 5. Core voltage as measured on device pin to guarantee published silicon performance. 6. Core voltage can exceed 1.26 V with the limitations provided in Section 4.2: Absolute maximum ratings, provided that HVD134_C monitor reset is disabled. 7. 1.260 V - 1.290 V range allowed periodically for supply with sinusoidal shape and average supply value below or equal to 1.236 V at the given temperature profile. 8. Full device lifetime. I/O and analog input specifications are only valid if the injection current on adjacent pins is within these limits. See Section 4.2: Absolute maximum ratings for maximum input current for reliability requirements. 9. The I/O pins on the device are clamped to the I/O supply rails for ESD protection. When the voltage of the input pins is above the supply rail, current will be injected through the clamp diode to the supply rails. For external RC network calculation, assume typical 0.3 V drop across the active diode. The diode voltage drop varies with temperature. 10. The limits for the sum of all normal and injected currents on all pads within the same supply segment can be found in Section 4.8.3: I/O pad current specifications . 11. Positive and negative Dynamic current injection pulses are allowed up to this limit. I/O and ADC specifications are not granted. See the dedicated chapters for the different specification limits. See the Absolute Maximum Ratings table for maximum input current for reliability requirements. Refer to the following pulses definitions: Pulse1 (ISO 7637-2:2011), Pulse 2a(ISO 7637-2:2011 5.6.2), Pulse 3a (ISO 7637-2:2011 5.6.3), Pulse 3b (ISO 7637-2:2011 5.6.3). Table 5. Operating conditions (continued) Symbol C Parameter Conditions Value(1) Unit Min Typ Max |
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