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ST25R3916 数据表(PDF) 75 Page - STMicroelectronics |
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ST25R3916 数据表(HTML) 75 Page - STMicroelectronics |
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75 / 157 page ![]() DS12484 Rev 4 75/157 ST25R3916/7 Application information 156 4.5.5 Bit rate definition register Register space: A Address: 04h Type: RW 1x x x Bit rate detection mode – om2: enable FeliCa™ bit rate detection mode –om1: RFU – om0: enable ISO14443A bit rate detection mode Other combinations Not allowed 1. The nfc_f0 = 1 must not be set in Bit rate detection mode (see Table 26). 2. When in Passive target and Bit rate detection modes, the pt_res setting is used to generate the RF field (high ohmic setting of pt_res can prevent RF field generation). Table 24. Target operation modes(1)(2) (continued) om3 om2 om1 om0 Comments Table 25. Bit rate definition register Bit Name Default Function Comments 7RFU 0 Refer to Table 26 - 6RFU 0 - 5tx_rate1 0 Selects bit rate for Tx. 4tx_rate0 0 3RFU 0 - 2RFU 0 - 1rx_rate1 0 Selects bit rate for Rx. 0rx_rate0 0 Table 26. Bit rate coding(1) rate3 rate2 rate1 rate0 Bit rate (kbit/s) Comments 0000 fc / 128 (~106) - 0001 fc / 64 (~212) - 0010 fc / 32 (~424) - 0011 fc / 16 (~848) - Other combinations - Not used 1. If a non supported bit rate is selected the Tx/Rx operation is disabled. |
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