ST25R3916 datasheet(96/157 Pages) STMICROELECTRONICS

96 / 157 page

Application information

ST25R3916/7

96/157

DS12484 Rev 4

4.5.30

Mask main interrupt register

Address: 16h

Type: RW

4.5.31

Mask timer and NFC interrupt register

Address: 17h

Type: RW

Table 58. Mask main interrupt register

Bit

Name

Default

Function

Comments

M_osc

1: Mask IRQ when oscillator frequency is stable

M_wl

1: Mask IRQ due to FIFO water level

M_rxs

1: Mask IRQ due to start of receive

M_rxe

1: Mask IRQ due to end of receive

M_txe

1: Mask IRQ due to end of transmission

M_col

1: Mask IRQ due to bit collision

M_rx_rest

1: Mask IRQ due to automatic reception restart

RFU

Not used

Table 59. Mask timer and NFC interrupt register

Bit

Name

Default

Function

Comments

M_dct

1: Mask IRQ due to termination of direct command

M_nre

1: Mask IRQ due to No-response timer expire

M_gpe

1: Mask IRQ due to general purpose timer expire

M_eon

1: Mask IRQ due to detection of external field higher

than Target activation level

M_eof

1: Mask IRQ due to detection of external field drop

below Target activation level

2M_cac

1: Mask IRQ due to detection of collision during RF

Collision Avoidance

M_cat

1: Mask IRQ after minimum guard time expire

0M_nfct

1: Mask IRQ when in target mode the initiator bit

rate has been recognized

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