数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ST25R3916 数据表(PDF) 28 Page - STMicroelectronics

部件名 ST25R3916
功能描述  High performance NFC universal device and EMVCo™ reader
PDF  157 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST25R3916 数据表(HTML) 28 Page - STMicroelectronics

Back Button ST25R3916 Datasheet HTML 24Page - STMicroelectronics ST25R3916 Datasheet HTML 25Page - STMicroelectronics ST25R3916 Datasheet HTML 26Page - STMicroelectronics ST25R3916 Datasheet HTML 27Page - STMicroelectronics ST25R3916 Datasheet HTML 28Page - STMicroelectronics ST25R3916 Datasheet HTML 29Page - STMicroelectronics ST25R3916 Datasheet HTML 30Page - STMicroelectronics ST25R3916 Datasheet HTML 31Page - STMicroelectronics ST25R3916 Datasheet HTML 32Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 157 page
background image
Application information
ST25R3916/7
28/157
DS12484 Rev 4
Filtering and gain stages
The receiver chain has band pass filtering characteristics. The filtering is optimized to pass
subcarrier frequencies while rejecting carrier frequency, low frequency noise and DC
component. Filtering and gain is implemented in three stages, the first and the last stage
have first order high pass characteristics while the mid stage has second order low-pass
characteristic.
The gain and filtering characteristics can be optimized depending on the application by
writing the Receiver configuration register 1 (filtering), Receiver configuration register 3
(primarily gain in first stage) and Receiver configuration register 4 (gain in second and third
stage).
The gain of first stage is around 20 dB and can be reduced in six 2.5 dB steps. There is also
a special boost mode available, which increases the max gain by additional 5.5 dB. The first
stage gain can only be modified by writing Receiver configuration register 3. The default
setting of this register is the minimum gain. Default first stage zero is located at 60 kHz, it
can also be lowered to 40 or 12 kHz by writing option bits in the Receiver configuration
register 1. The first stage can be reconfigured to second order high-pass at 600 kHz by
option bit z600k. The control of the first and third stage zeros is done with common control
bits (see Table 6).
The gain in the second and third stage is 23 dB and can be reduced in six 3 dB steps. Gain
of these two stages is included in AGC and Squelch loops or can be manually set in
Table 5. Low-pass control
rec1<5>lp2
rec1<4>lp1
rec1<3>lp0
-1 dB point
0
0
0
1200 kHz
0
0
1
600 kHz
0
1
0
300 kHz
10
0
2 MHz
10
1
7 MHz
Others
Not used
Table 6. First and third zero setting
rec1<3>z600k rec1<2>h200
rec1<1>h80
rec1<0>z12k First stage zero Third stage zero
00
0
0
60 kHz
400 kHz
0
1
0
0
200 kHz
0
0
1
0
40 kHz
80 kHz
00
0
1
12 kHz
200 kHz
0
0
1
1
80 kHz
0
1
0
1
200 kHz
10
0
0
600 kHz
400 kHz
1
1
0
0
200 kHz
Others
Not used



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com