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ST25R3916 数据表(PDF) 30 Page - STMicroelectronics

部件名 ST25R3916
功能描述  High performance NFC universal device and EMVCo™ reader
PDF  157 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST25R3916 数据表(HTML) 30 Page - STMicroelectronics

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Application information
ST25R3916/7
30/157
DS12484 Rev 4
AGC
The AGC (automatic gain control) can reduce the gain to keep the receiver chain and input
to the digitizing stage out of saturation. The demodulation process is also less influenced by
system noise when the gain is properly adjusted.
The AGC logic starts operating when the signal rx_on is asserted to high and is reset when
it is reset to low. The state of the receiver gain is stored in the Gain reduction state register
during a high to low transition of bit rx_on. Reading this register later on gives information of
the gain setting used during the last reception.
The AGC system comprises a window comparator and an AGC ratio that can be set to 3 or
to 6. As an example, when the AGC ratio is set to 6 the window is six times larger than the
data digitalization window comparator. When the AGC function is enabled the gain is
reduced until there are no transitions on its output. Such procedure assures that the input to
digitalization window comparator is up to 6 times larger than its window.
If the AGC ratio is set to three, the input to the digitalization window comparator is set to be
up to 3 times larger than its window.
The AGC operation is controlled by the control bits agc_en, agc_m, agc_alg, and agc6_3 in
Receiver configuration register 2.
The bit agc_m defines the AGC mode when two AGC modes are available. The AGC can
operate during the complete RX process as long as the signal rx_on is high and it can be
enabled only during first eight subcarrier pulses.
There are two AGC algorithms to choose from bit agc_alg. The AGC can start either by
pre-setting (maximum digitizer window and maximum gain) or by resetting (minimum
digitizer window and maximum gain) it. The algorithm with preset is faster and therefore
recommended for protocols with short SOF (like ISO14443A at 106 kbps).
Correlator
The correlators correlate the incoming filtered subcarrier with 848 kHz. The aim of the
correlation is to maximize the system sensitivity at 848 kHz, while rejecting other
frequencies. There are two correlators in the system for AM (or I) channel and PM (or Q)
channel.
Correlator settings are defined in Correlator configuration register 1 and Correlator
configuration register 2.
RSSI
The receiver also performs the RSSI (received signal strength indicator) measurement for
both channels. The RSSI measurement is started after the rising edge of rx_on. It stays
active while the signal rx_on is high and frozen while rx_on is low. It is a peak hold system
where the value can only increase from initial 0 value. Every time the AGC reduces the gain
the RSSI measurement is reset and starts from 0. The result of RSSI measurements is a
4-bit value that can be observed by reading the RSSI display register. The LSB step is
2.8 dB, the maximum value is Dh (13d).
Since the RSSI measurement is of peak hold type, the result does not follow any variations
in the signal strength (the highest value will be kept). To follow RSSI variation it is possible
to reset RSSI bits and restart the measurement by sending direct command Clear RSSI.



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