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ST25R3916 数据表(PDF) 40 Page - STMicroelectronics |
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ST25R3916 数据表(HTML) 40 Page - STMicroelectronics |
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40 / 157 page ![]() Application information ST25R3916/7 40/157 DS12484 Rev 4 typical application schematics with all regulators used. For regulators recommended blocking capacitors are 2.2 μF in parallel with 10 nF, for pin AGDC 1 μF in parallel with 10 nF is suggested. Figure 11. ST25R3916/7 power supply system Regulators have two basic operation modes depending on supply voltage, 3.3 V supply mode (max. 3.6 V) and 5 V supply mode (max 5.5 V). The supply mode is set by writing bit sup3V in theIO configuration register 2. Default setting is 5 V so this bit has to be set to 1 after power-up in case of 3.3 V supply. In 3.3 V mode all regulators are set to the same regulated voltage in range from 2.4 to 3.4 V, while in 5 V only the VDD_RF can be set in range from 3.6 to 5.1 V, while VDD_A and VDD_D are fixed to 3.4 V. Figure 11 also shows the signals controlling the power supply system. The regulators are operating when signal en is high (en is configuration bit in Operation control register). When signal en is low the ST25R3916/7 is in low power Power-down mode. In this mode consumption of the power supply system is also minimized. VDD_RF regulator The purpose of this regulator is to improve the PSRR of the transmitter (the noise of the transmitter power supply is emitted and fed back to the receiver). The VDD_RF regulator operation is controlled and observed by writing and reading two regulator registers: Regulator voltage control register controls the regulator mode and regulated voltage. Bit reg_s controls regulator mode. If it is set to 0 (default state) the regulated voltage is set using direct command Adjust regulators. When bit reg_s is asserted to 1 regulated voltage is defined by bits rege_3 to rege_0 of the same register. The regulated voltage adjustment range depends on the power supply mode. In case of 5 V supply mode the adjustment range is between 3.6 and 5.1 V in steps of 120 mV, in case of 3.3 V supply mode the adjustment range is from 2.4 to 3.6 V with 100 mV steps. Regulator display register is a read only register that displays actual regulated voltage when regulator is operating. It is especially useful in case of automatic mode, since the MS52437V1 VDD_D regulator Power-down support sup3v 50Ω VDD_A regulator VDD_RF regulator EN BGR and AGD Autoreg AGDC VDD_RF VDD_D VDD_A reg<3:0> VDD Adjust regulators rege<3:0> VDD_AM regulator VDD_TX VDD_AM VDD_DR |
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