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ST25R3916 数据表(PDF) 78 Page - STMicroelectronics |
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ST25R3916 数据表(HTML) 78 Page - STMicroelectronics |
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78 / 157 page  Application information ST25R3916/7 78/157 DS12484 Rev 4 4.5.8 ISO14443B and FeliCa settings register Register space: A Address: 07h Type: RW Table 30. ISO14443B and FeliCa settings register Bit Name Default Function Comments 7tr1_1 0 Refer to Table 31 - 6tr1_0 0 5 no_sof 0 1: No SOF PICC to PCD According to ISO14443-3 chapter 7.10.3.3. Support of B’. 4 no_eof 0 1: No EOF PICC to PCD According to ISO14443-3 chapter 7.10.3.3. Supported only in coherent reception mode. 3RFU 0 - - 2RFU 0 - - 1f_p1 0 00: 48 01: 64 10: 80 11: 96 FeliCa™ preamble length (valid also for NFCIP-1 active communication bit rates 212 and 424 kb/s) 0f_p0 0 Table 31. Minimum TR1 codings tr1_1 tr1_0 Minimum TR1 for a PICC to PCD bit rate fc / 128 >fc / 128 0 0 80 / fs 0 1 64 / fs 32 / fs 10 Not used 11 Not used |
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