ST25R3916 datasheet(76/157 Pages) STMICROELECTRONICS

76 / 157 page

Application information

ST25R3916/7

76/157

DS12484 Rev 4

4.5.6

ISO14443A and NFC 106kb/s settings register

Address: 05h

Type: RW

Table 27. ISO14443A and NFC 106kb/s settings register

Bit

Name

Default

Function

Comments

no_tx_par

1: No parity bit is generated

during Tx

Data stream is taken from FIFO, transmit to be

done using command Transmit Without CRC(1).

no_rx_par

1: Receive and put in FIFO also

the parity bit

When set to 1 received bit stream is put in the

FIFO, no parity and CRC detection is done(1).

Supported only for 106 kbit/s data rate.

5nfc_f0

1: Support of NFCIP-1 Transport

Frame format

Adds SB (F0) and LEN bytes during Tx and skip

SB (F0) byte during Rx.

Must not be set in bit rate detection mode.

p_len3

Refer to Table 28

Modulation pulse width, defined in number of

13.56 MHz clock periods.

p_len2

p_len1

p_len0

antcl

0: Standard frame

1: ISO14443 anticollision frame

Must be set to 1 for reception of ISO14443A bit

oriented anticollision frames in reader mode.

Must be set to 0 for all other frames and modes.

1. Supported in reader modes only, not supported in card emulation modes.

Table 28. ISO14443A modulation pulse width

p_len3

p_len2

p_len1

p_len0

Pulse width in number of 1 / fc for different bit rates

fc / 128

fc / 64

fc / 32

fc / 16

111

ST25R3916 数据表(PDF) 76 Page - STMicroelectronics

ST25R3916 数据表(HTML) 76 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载