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ST7LUS5 数据表(PDF) 77 Page - STMicroelectronics |
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ST7LUS5 数据表(HTML) 77 Page - STMicroelectronics |
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77 / 124 page ![]() ST7LUS5, ST7LU05, ST7LU09 On-chip peripherals 77/124 RAIN is the maximum recommended impedance for an analog input signal. If the impedance is too high, this will result in a loss of accuracy due to leakage and sampling not being completed in the allocated time. A/D conversion phases The A/D conversion is based on two conversion phases: ● Sample capacitor loading [duration: tSAMPLE] During this phase, the VAIN input voltage to be measured is loaded into the CADC sample capacitor. ● A/D conversion [duration: tHOLD] During this phase, the A/D conversion is computed (8 successive approximations cycles) and the CADC sample capacitor is disconnected from the analog input pin to get the optimum analog to digital conversion accuracy. The total conversion time: tCONV = tSAMPLE + tHOLD While the ADC is on, these two phases are continuously repeated. At the end of each conversion, the sample capacitor is kept loaded with the previous measurement load. The advantage of this behavior is that it minimizes the current consumption on the analog pin in case of single input channel measurement. A/D conversion The analog input ports must be configured as input, no pull-up, no interrupt. Refer to the “I/O ports” chapter. Using these pins as analog inputs does not affect the ability of the port to be read as a logic input. In the ADCCSR register: Select the CS[2:0] bits to assign the analog channel to convert. ADC conversion mode In the ADCCSR register: Set the ADON bit to enable the A/D converter and to start the conversion. From this time on, the ADC performs a continuous conversion of the selected channel. When a conversion is complete: – The EOC bit is set by hardware. – The result is in the ADCDR registers. A read to the ADCDRH resets the EOC bit. To read the 10 bits, perform the following steps: 1. Poll EOC bit 2. Read ADCDRL 3. Read ADCDRH. This clears EOC automatically. To read only 8 bits, perform the following steps: 1. Poll EOC bit 2. Read ADCDRH. This clears EOC automatically. |
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