ST7LUS5 datasheet(30/124 Pages) STMICROELECTRONICS

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Supply, reset and clock management

ST7LUS5, ST7LU05, ST7LU09

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6.2.3

System integrity (SI) control/status register (SICSR)

6.2.4

Internal RC prescaler selection register (INTRCPRR)

SICSR

Reset value: 0000 0x00 (0xh)

654

Reserved

CR[1:0]

Reserved

LVDRF

Reserved

R/W

Table 9.

SICSR register description

Bit

Name

Function

Reserved, must be kept cleared.

6:5 CR[1:0]

RC Oscillator Frequency Adjustment bits

These bits, as well as CR[9:2] bits in the RCCR register must be written

immediately after reset to adjust the RC oscillator frequency and to obtain the

required accuracy. Refer to Section 6.1 on page 27.

4:3

Reserved, must be kept cleared.

2:0

LVDRF

System Integrity bits

Refer to Section 7.4: System integrity management (SI).

1:0

Reserved, must be kept cleared.

INTRCPRR

Reset value: 0000 0011 (03h)

654

CK[2:0]

Reserved

R/W

Table 10.

INTRCPRR register description

Bit

Name

Function

7:5

CK[2:0]

Internal RC Prescaler Selection

These bits are set by software and cleared by hardware after a reset. These bits

select the prescaler of the internal RC oscillator as follows (see also Figure 9 on

page 32):

000: fOSC =8MHz

001: fOSC =4MHz

010: fOSC =2MHz

011: fOSC =1MHz

100: fOSC = 500 kHz

Notes:

1. If the internal RC is used with a supply operating range below 3.3V, a division

ratio of at least 2 must be enabled in the RC prescaler.

2. Configuration '000' is not allowed at 3.3V operation.

4:0

Reserved, must be kept cleared.

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