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ST7LUS5 数据表(PDF) 31 Page - STMicroelectronics |
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ST7LUS5 数据表(HTML) 31 Page - STMicroelectronics |
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31 / 124 page  ST7LUS5, ST7LU05, ST7LU09 Supply, reset and clock management 31/124 6.2.5 Clock controller control/status register (CKCNTCSR) CKCNTCSR Reset value: 0000 1001 (09h) 7654 3 2 1 0 Reserved AWU_FLAG RC_FLAG Reserved RC/AWU - R/W R/W - R/W Table 11. CKCNTCSR register description Bit Name Function 7:4 - Reserved, must be kept cleared. 3 AWU_FLAG AWU Selection This bit is set and cleared by hardware. 0: No switch from AWU to RC requested 1: AWU clock activated and temporization completed 2 RC_FLAG RC Selection This bit is set and cleared by hardware. 0: No switch from RC to AWU requested 1: RC clock activated and temporization completed 1 - Reserved, must be kept cleared. 0 RC/AWU RC/AWU Selection 0: RC enabled 1: AWU enabled (default value) Table 12. Clock register map and reset values Address (Hex.) Register label 76 54 3 2 1 0 0038h MCCSR Reset value 0 0 0 0 0 0 0 SMS 0 0039h RCCR Reset value CR9 1 CR8 1 CR7 1 CR6 1 CR5 1 CR4 1 CR3 1 CR2 1 003Ah SICSR Reset value 0 CR1 0 CR0 00 0 LVDRF x0 0 003Eh INTRCPRR Reset value CK2 0 CK1 0 CK0 00 0 0 1 1 003Fh CKCNTCSR Reset value 0 0 0 0 AWU_FLAG 1 RC_FLAG 00 RC/AWU 1 |
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