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ST7LUS5 数据表(PDF) 39 Page - STMicroelectronics |
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ST7LUS5 数据表(HTML) 39 Page - STMicroelectronics |
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39 / 124 page  ST7LUS5, ST7LU05, ST7LU09 Interrupts 39/124 7.3.1 External interrupt control register 1 (EICR1) Table 15. Interrupt mapping No. Source block Description Register label Priority order Exit from HALT Address vector RESET Reset N/A Highest Priority Lowest Priority yes FFFEh-FFFFh TRAP Software Interrupt no FFFCh-FFFDh 0 AWU Auto Wake-up Interrupt AWUCSR yes(1) FFFAh-FFFBh 1 ei0 External Interrupt 0 N/A yes FFF8h-FFF9h 2 ei1 External Interrupt 1 FFF6h-FFF7h 3 ei2 External Interrupt 2 FFF4h-FFF5h 4 Not used no FFF2h-FFF3h 5 ei3 External Interrupt 3 yes FFF0h-FFF1h 6(2) ei4(2) External Interrupt 4(2) no(2) FFEEh-FFEFh 7 Not used no FFECh-FFEDh 8 AT TIMER AT TIMER Output Compare Interrupt PWMxCSR or ATCSR no FFEAh-FFEBh 9 AT TIMER Overflow Interrupt ATCSR yes(3) FFE8h-FFE9h 10 LITE TIMER LITE TIMER Input Capture Interrupt LTCSR no FFE6h-FFE7h 11 LITE TIMER RTC1 Interrupt LTCSR yes(3) FFE4h-FFE5h 12 Not used no FFE2h-FFE3h 13 Not used no FFE0h-FFE1h 1. This interrupt exits the MCU from “Auto Wake-up from Halt” mode only. 2. This interrupt exits the MCU from “Wait” and “Active Halt” modes only. Moreover, IS4[1:0] = 01 is the only safe configuration to avoid a spurious interrupt in Halt and AWUFH mode. 3. These interrupts exit the MCU from “Active Halt” mode only. EICR1 Reset value: 0000 0000 (00h) 7 654 32 10 Reserved IS2[1:0] IS1[1:0] IS0[1:0] - R/W R/W R/W Table 16. EICR1 register description Bit Name Function 7:6 - Reserved 5:4 IS2[1:0] ei2 sensitivity These bits define the interrupt sensitivity for ei2 according to Table 18. |
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