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CS5501-SD 数据表(PDF) 50 Page - Cirrus Logic

部件名 CS5501-SD
功能描述  Low-Cost, 16 & 20-Bit Measurement A/D Converter
PDF  54 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS5501-SD 数据表(HTML) 50 Page - Cirrus Logic

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"D" input to flip-flop U8B is enabled to a "1" at
the same time CS goes low. When DRDY returns
high flip-flop U8B is toggled and resets the
counter back to zero which terminates the CS en-
able. The counter then accumulates counts until
the selected output activates CS low once again.
DIP Switch Selections/Calibration Initiation
Several control pins of the CS5501/CS5503 can
be level activated by DIP switch selection, or by
microcontroller at P8, as shown in Figure 5. DIP
switch SW1 selections are depicted in Tables 5
and 6. The CAL pushbutton is used to initiate a
calibration cycle in accordance with DIP switch
positions 1 and 2. The CAL pushbutton should be
activated any time power is first applied to the
board or any time the conversion mode (BP/UP)
is changed on the DIP switch. Remote control of
the CAL signal is available on connector P8.
Connector P8 also allows access to the DIP
switch functions by a microcomputer/microcon-
troller. The DIP switches should be placed in the
off position if off-board control of the signals on
connector P8 is implemented.
Voltage Reference
The evaluation board includes a 2.5 volt refer-
ence. Potentiometer R9 can be used to trim the
reference output to a precise value.
Analog Input Range: Unipolar Mode
The value of the reference voltage sets the analog
input signal range. In unipolar mode the analog
input range extends from AGND to VREF. If the
analog input goes above VREF the converter will
output all "1’s". If the input goes below AGND,
the CS5501/CS5503 will output all "0’s".
Analog Input Range: Bipolar Mode
The analog signal input range in the bipolar mode
is set by the reference to be from +VREF to -
VREF. If the input signal goes above +VREF, the
CS5501/CS5503 will output all "1’s". Input sig-
nals below -VREF cause the output data to be all
"0’s".
Table 5. DIP Switch Selections
Table 6. Calibration Mode Table
0
1
1
0
FS Cal
ZS Cal
SC2
SC1
CAL
Cal Type
VREF
AGND
0
0
Self-Cal
-
AIN
1
1
AIN
-
VREF
AIN
System Offset
System Offset
& System Gain
Sequence
One Step
1st Step
2nd Step
One Step
Switch
SW1-1
SW1-2
SW1-3
SW1-4
ON
SC2 = 0
SC1 = 0
UNIPOLAR
SLEEP
OFF
BIPOLAR
AWAKE
SC2 = 1
SC1 = 1
Figure 5. DIP Switch / Header Control Pin Selection
P8
SW2
SC2
SC1
V+
123
4
17
4
12
11
SW1
CAL
SC2
SLP
B/U
CAL
V+
CAL
13
SLEEP
BP/UP
CS5501/
U4
CS5503
WARNING: Some evaluation boards were produced with the
SC1 and SC2 labels reversed on the silkscreen
SC1
CDB5501/CDB5503
50
DS31DB3



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