CS5501-SD datasheet(28/54 Pages) CIRRUS

28 / 54 page

to ensure that logic inputs are maintained at either

VD+ ar DGND potential when SLEEP is low.

Note that battery life could be shortened if the

+5 V supply drops slowly during power-down. As

the supply drops below the battery voltage but not

yet below the logic threshold of the SLEEP pin,

the battery will be supplying the CS5501/CS5503

at full power (typically 3 mA). Faster transitions

at SLEEP can be triggered using a resistive di-

vider or a simple resistor network to generate the

SLEEP input from the +5 V supply.

Output Loading Considerations

To maximize performance of the CS5501/

CS5503, the output drive currents from the digital

output lines should be minimized.

It is recom-

mended that CMOS logic gates (4000B, 74HC,

etc.) be used to provide minimum loading. If it is

necessary to drive an opto-isolator the outputs of

the CS5501/CS5503 should be buffered. An easy

means of driving the LED of an opto-isolator is to

use a 2N7000 or 2N7002 low cost FET.

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CS5501/CS5503

DS31F2

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