CS5501-SD datasheet(29/54 Pages) CIRRUS

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PIN DESCRIPTIONS

Clock Generator

CLKIN; CLKOUT -Clock In; Clock Out, Pins 3 and 2.

A gate inside the CS5501/CS5503 is connected to these pins and can be used with a crystal or

ceramic resonator to provide the master clock for the device. Alternatively, an external (CMOS

compatible) clock can be input to the CLKIN pin as the master clock for the device. When not

in SLEEP mode, a master clock (CLKIN) should be present at all times.

Serial Output I/O

MODE -Serial Interface Mode Select, Pin 1.

Selects the operating mode of the serial port. If tied to VD- (-5V), the CS5501 will operate in

the UART-compatible AC mode for Asynchronous Communication. The SCLK pin will

operate as an input to set the data rate, and data will transmit formatted with one start and two

stop bits. If MODE is tied to DGND, the CS5501/CS5503 will operate in the SEC

(Synchronous External-Clocking) mode, with the SCLK pin operating as an input and the

output appearing MSB-first. If MODE is tied to VD+ (+5V), the CS5501/CS5503 will operate

in its SSC (Synchronous Self-Clocking) mode, with SCLK providing a serial clock output of

CLKIN/4 (25% duty-cycle).

DRDY -Data Ready, Pin 18.

DRDY goes low every 1024 cycles of CLKIN to indicate that new data has been placed in the

output port. DRDY goes high when all the serial port data is clocked out, when the serial port

is being updated with new data, when a calibration is in progress, or when SLEEP is low.

CS -Chip Select, Pin 16.

An input which can be enabled by an external device to gain control over the serial port of the

CS5501/CS5503.

SERIAL INTERFACE MODE SELECT

MODE

SDATA

SERIAL DATA OUTPUT

CLOCK OUT

CLKOUT

SCLK

SERIAL CLOCK INPUT/OUTPUT

CLOCK IN

CLKIN

DRDY

DATA READY

SYSTEM CALIBRATION 1

SC1

SC2

SYSTEM CALIBRATION 2

DIGITAL GROUND

DGND

CHIP SELECT

NEGATIVE DIGITAL POWER

VD-

VD+

POSITIVE DIGITAL POWER

NEGATIVE ANALOG POWER

VA-

VA+

POSITIVE ANALOG POWER

ANALOG GROUND

AGND

CAL

CALIBRATE

ANALOG IN

AIN

BP/UP

BIPOLAR/UNIPOLAR SELECT

VOLTAGE REFERENCE

VREF

SLEEP

* Pinout applies to both DIP and SOIC packages

CS5501/CS5503

DS31F2

CS5501-SD 数据表(PDF) 29 Page - Cirrus Logic

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