数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

CS5501-SD 数据表(PDF) 26 Page - Cirrus Logic

部件名 CS5501-SD
功能描述  Low-Cost, 16 & 20-Bit Measurement A/D Converter
PDF  54 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS5501-SD 数据表(HTML) 26 Page - Cirrus Logic

Back Button CS5501-SD Datasheet HTML 22Page - Cirrus Logic CS5501-SD Datasheet HTML 23Page - Cirrus Logic CS5501-SD Datasheet HTML 24Page - Cirrus Logic CS5501-SD Datasheet HTML 25Page - Cirrus Logic CS5501-SD Datasheet HTML 26Page - Cirrus Logic CS5501-SD Datasheet HTML 27Page - Cirrus Logic CS5501-SD Datasheet HTML 28Page - Cirrus Logic CS5501-SD Datasheet HTML 29Page - Cirrus Logic CS5501-SD Datasheet HTML 30Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 26 / 54 page
background image
age reference, and the analog signal conditioning
circuitry from the same primary source. If sepa-
rate supplies are used, it is recommended that the
CS5501/CS5503 be powered up first. If a com-
mon power source is used for the analog signal
conditioning circuitry as well as the A/D con-
verter,
this power source should be applied
before application of power to the digital logic
supply.
The CS5501/CS5503 exhibit good power supply
rejection for frequencies within the passband (dc
to 10 Hz). Any small offset or gain error caused
by long term drift of the power supplies can be
removed by recalibration. Above 10 Hz the digi-
tal filter will provide additional rejection. When
the benefits of the digital filter are added to the
regular power supply rejection the effects of line
frequency variations (60 Hz) on the power sup-
plies will be reduced greater than 120 dB. If the
supply voltages for the CS5501/CS5503 are gen-
erated with a dc-dc converter the operating
frequency of the dc-dc converter should not oper-
ate at the sampling frequency of the
CS5501/CS5503 or at integer multiples thereof.
At these frequencies the digital filter will not aid
in power supply rejection. See Anti-Alias Consid-
erations section of this data sheet.
CS5501
CS5503
+5V
Analog
Supply
2
3
0.1
µF
CLKIN
CLKOUT
VD+
15
10
VA+
14
11
1
MODE
19
SCLK
Optional
Clock
Source
Sleep Mode
Control
Output
Mode Select
Serial
Data
Interface
20
SDATA
16
18
Control
Logic
CAL
SC1
SC2
13
4
17
12
BP/UP
AIN
9
Calibration
Control
Bipolar/
Unipolar
Input Select
VREF
AGND
8
10
5
DGND
VD-
6
VA-
7
0.1
µF
Analog
Signal
Source
0.1
µF
-5V
Analog
Supply
SLEEP
DRDY
CS
0
VREF
or
±VREF
0.0047
µF NPO
* Recommended to
reduce high
frequency noise
+5V
Analog
Supply
Voltage
Reference
200
Ω∗
Unused Logic Inputs
must be connected
to DGND or VD+
+2.5V
10
0.1
µF
Figure 15. Typical Connection Diagram
CS5501/CS5503
26
DS31F2



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com