Specification
NET2272 USB Peripheral Controller
______________________________________________________________________________
NetChip Technology, Inc., 2003
Patent Pending
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490
FAX (650) 526-1494
http://www.netchip.com
Rev 1.2, October 15, 2003
4
4.6.2.2
Fast DMA Write Timing ..................................................................................................................28
4.6.2.3
Burst DMA Write Timing ................................................................................................................28
4.6.3
DMA Split Bus Mode .............................................................................................................29
4.6.4
Terminating DMA Transfers..................................................................................................29
4.6.5
DMA Performance.................................................................................................................30
4.6.5.1
DMA Read; Slow Mode...................................................................................................................30
4.6.5.2
DMA Read; Fast Mode ....................................................................................................................30
4.6.5.3
DMA Read; Burst Mode ..................................................................................................................30
4.6.5.4
DMA Write; Slow Mode..................................................................................................................30
4.6.5.5
DMA Write; Fast Mode ...................................................................................................................30
4.6.5.6
DMA Write; Burst Mode .................................................................................................................31
5
USB FUNCTIONAL DESCRIPTION ...............................................................................................32
5.1
USB INTERFACE .........................................................................................................................32
5.2
USB PROTOCOL ..........................................................................................................................32
5.2.1
Tokens....................................................................................................................................32
5.2.2
Packets...................................................................................................................................32
5.2.3
Transaction ............................................................................................................................33
5.2.4
Transfer .................................................................................................................................33
5.3
AUTOMATIC RETRIES ..................................................................................................................33
5.3.1
Out Transactions ...................................................................................................................33
5.3.2
In Transactions ......................................................................................................................33
5.4
PING FLOW CONTROL..................................................................................................................33
5.5
PACKET SIZES .............................................................................................................................33
5.6
USB ENDPOINTS .........................................................................................................................34
5.6.1
Control Endpoint - Endpoint 0 ..............................................................................................34
5.6.1.1
Control Write Transfer .....................................................................................................................34
5.6.2
Control Write Transfer Details..............................................................................................35
5.6.2.1
Control Read Transfer......................................................................................................................36
5.6.2.2
Control Read Transfer Details..........................................................................................................36
5.6.3
Isochronous Endpoints ..........................................................................................................37
5.6.3.1
Isochronous Out Transactions ..........................................................................................................38
5.6.3.2
High Bandwidth Isochronous OUT Transactions.............................................................................38
5.6.3.3
Isochronous In Transactions.............................................................................................................39
5.6.3.4
High Bandwidth Isochronous IN Transactions.................................................................................39
5.6.4
Bulk Endpoints.......................................................................................................................40
5.6.4.1
Bulk Out Transactions......................................................................................................................40
5.6.4.2
Bulk In Endpoints ............................................................................................................................41
5.6.5
Interrupt Endpoints................................................................................................................42
5.6.5.1
Interrupt Out Transactions ...............................................................................................................42
5.6.5.2
Interrupt In Endpoints ......................................................................................................................42
5.6.5.3
High Bandwidth INTERRUPT Endpoints .......................................................................................42
5.7
NETCHIP VIRTUAL ENDPOINTS ...................................................................................................43
5.7.1
Overview:...............................................................................................................................43
5.7.2
Endpoint Virtualization..........................................................................................................43
5.7.3
Efficiency Considerations:.....................................................................................................44
5.7.4
Deadlock Considerations: .....................................................................................................45
5.7.5
Buffer Control........................................................................................................................45
5.7.6
Summary ................................................................................................................................45
5.8
PACKET BUFFERS ........................................................................................................................46
5.8.1
IN Endpoint Buffers ...............................................................................................................46
5.8.1.1
16-bit Post-Validation ......................................................................................................................47
5.8.2
OUT Endpoint Buffers ...........................................................................................................47
5.9
USB TEST MODES ......................................................................................................................48
6
INTERRUPT AND STATUS REGISTER OPERATION ...............................................................49
6.1
INTERRUPT STATUS REGISTERS (IRQSTAT0, IRQSTAT1)........................................................49
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