Specification
NET2272 USB Peripheral Controller
______________________________________________________________________________
NetChip Technology, Inc., 2003
Patent Pending
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490
FAX (650) 526-1494
http://www.netchip.com
Rev 1.2, October 15, 2003
55
8.3
Numeric Register Listing
This table shows the number of address bits required to access a register directly. If only four address bits are
supplied to the chip, then the registers that require 5 address bits must be addressed indirectly using
REGADDRPTR and REGDATA.
Addresses marked with (P) are paged registers selected by the Page Select field in the PAGESEL register.
Address
Address bits
Required
D[15:8]
D[7:0]
Register Description
00h
1
REGADDRPTR
Register Address Pointer for indirect register addressing
01h
1
REGDATA1
REGDATA
Register Data port for indirect register addressing
02h
2
IRQSTAT0
Interrupt Status Register (low byte)
03h
2
IRQSTAT1
Interrupt Status Register (high byte)
04h
3
PAGESEL
Page Select Register. Select current Endpoint
05h (P)
3
EP_DATA1
EP_DATA
Endpoint Data Register
06h (P)
3
EP_STAT0
Endpoint Main Status
07h (P)
3
EP_STAT1
08h (P)
4
EP_TRANSFER0
For IN endpoint, number of bytes to transfer to host.
09h (P)
4
EP_TRANSFER1
0Ah (P)
4
EP_TRANSFER2
0Bh (P)
4
EP_IRQENB
Endpoint Interrupt Enable
0Ch (P)
4
EP_AVAIL0
For IN endpoints, number of available spaces in buffer.
0Dh (P)
4
EP_AVAIL1
For OUT endpoints, number of bytes in buffer.
0Eh (P)
4
EP_RSPCLR
Endpoint Response Register Clear
0Fh (P)
4
EP_RSPSET
Endpoint Response Register Set
10-17h
5
Reserved
18h
5
USBCTL0
USB Control
19h
5
USBCTL1
1Ah
5
FRAME0
Frame Counter
1Bh
5
FRAME1
1Ch
5
DMAREQ
DMA Request Control Register
1Dh
5
SCRATCH
General-Purpose Scratchpad register
1E-1Fh
5
Reserved
20h
Indirect Only
IRQENB0
Interrupt Enable Register
21h
Indirect Only
IRQENB1
22h
Indirect Only
LOCCTL
Local Bus Control Register
23h
Indirect Only
CHIPREV_LEGACY
Legacy Chip Revision Number
24h
Indirect Only
LOCCTL1
Local Bus Control Register 1
25h
Indirect Only
CHIPREV_2272
Net2272 Chip Revision Number
26-27h
Indirect Only
Reserved
28h (P)
Indirect Only
EP_MAXPKT0
Endpoint Max Packet Size
29h (P)
Indirect Only
EP_MAXPKT1
2Ah (P)
Indirect Only
EP_CFG
Endpoint Configuration
2Bh (P)
Indirect Only
EP_HBW
Endpoint High-Bandwidth
2Ch (P)
Indirect Only
EP_BUFF_STATES
Endpoint Buffer States
2D-2Fh
Indirect Only
Reserved
30h
Indirect Only
OURADDR
Our USB address
31h
Indirect Only
USBDIAG
Diagnostic Register
32h
Indirect Only
USBTEST
USB 2.0 Test Control Register
33h
Indirect Only
XCVRDIAG
Transceiver Diagnostic Register
34h
Indirect Only
VIRTOUT0
Virtual OUT Interrupt 0
35h
Indirect Only
VIRTOUT1
Virtual OUT Interrupt 1
36h
Indirect Only
VIRTIN0
Virtual IN Interrupt 0
37h
Indirect Only
VIRTIN1
Virtual IN Interrupt 1
38-3Fh
Indirect Only
Reserved
40h
Indirect Only
SETUP0
Setup byte 0
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