Specification
NET2272 USB Peripheral Controller
______________________________________________________________________________
NetChip Technology, Inc., 2003
Patent Pending
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490
FAX (650) 526-1494
http://www.netchip.com
Rev 1.2, October 15, 2003
44
Before re-assigning an IN endpoint, firmware should:
1.
Stop loading data into the endpoint
2a. Wait until there are no buffers are waiting to be sent to the host (buffer states are available in the
EP_BUFF_STATE register). Note that because of the USB-inherent problem discussed in section
8.5.3.3 of the USB 2.0 Specification, waiting for the endpoint to empty can potentially lead to deadlock.
3a. Write 0 to the Endpoint Enable bit in the EP_CFG register.
4a. Check that the Endpoint Enable bit is clear.
OR
2b. Write 0 to the Endpoint Enable bit in the EP_CFG register.
3b. Check that the Endpoint Enable bit is clear.
4b. Read out and store any packets still loaded in the endpoint buffers. Reading is accomplished by
clearing the Endpoint Direction bit in the EP_CFG register so that buffer data is available to EP_DATA,
and the count is available in EP_AVAIL. Note that zero-length packets should also be detected, read
out, and stored. Zero-length packets can be detected from the EP_BUFF_STATE register.
5. Save the endpoint registers: EP_CFG, EP_IRQENB, EP_TRANSFER, EP_RSPSET, and
EP_MAXPKT.
6. Re-assign the endpoint.
Before re-assigning an OUT endpoint:
1.
Write 0 to the Endpoint Enable bit in the EP_CFG register.
2.
Check that the Endpoint Enable bit is clear.
3.
If there is any data available in the endpoint buffers, read it all out. Note that the host may send a packet
after firmware clears Endpoint Enable but before the endpoint is disabled.
4.
Save the endpoint registers: EP_CFG, EP_IRQENB, EP_TRANSFER, EP_RSPSET, and
EP_MAXPKT.
5.
Re-assign the endpoint.
Re-assigning a physical endpoint consists of programming the direction, type, and logical endpoint number and
setting Endpoint Enable in EP_CFG (these can all be done in a single register write operation), and loading
EP_IRQENB, EP_TRANSFER, EP_RSPSET, and EP_MAXPKT. The endpoint should also be flushed before
loading any data or enabling it.
Restoring EP_RSPSET/CLR requires two register writes, one to EP_RSPCLR with the logical NOT of the saved
EP_RSPSET value, and a second write to EP_RSPSET with the saved EP_RSPSET value. Note that clearing the
endpoint HALT bit also clears the endpoint toggle bit, so the write to EP_RSPCLR should occur first, followed by
the write to EP_RSPSET.
When restoring an IN endpoint with stored buffer data (method 2b-4b above), care should be take to restore
EP_TRANSFER correctly. Either EP_TRANSFER can be loaded with the stored EP_TRANSFER value plus the
count of stored data before the stored data is loaded, or the stored data can be loaded first (and packets validated by
writing 0 to EP_TRANSFER) followed by restoring EP_TRANSFER to the stored value.
5.7.3 Efficiency Considerations:
Depending on the number of virtual endpoints and the host-controller requirements, firmware may need to prioritize
virtual endpoint re-assignment. For example, a simple scheme of scheduling the lowest virtual endpoint request
each time might end up starving higher logical endpoint addresses. A "round-robin" priority is one method to ensure
at least some data travel on all endpoints.
Note that INTERRUPT endpoints may require special care because the polling interval between accesses can be
very long. It is not efficient to detect the endpoint access on an INTERRUPT endpoint (which was NAKed), switch
to that endpoint, and then detect and switch to a different endpoint before the next INTERRUPT polling interval
arrives. Once possible solution is to “lock down” the physical endpoint (prevent further endpoint switching) until a
minimum number of packets have passed through the endpoint.
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