Specification
NET2272 USB Peripheral Controller
______________________________________________________________________________
NetChip Technology, Inc., 2003
Patent Pending
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490
FAX (650) 526-1494
http://www.netchip.com
Rev 1.2, October 15, 2003
9
Serial Interface Engine (SIE):
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Interface between Packet Buffers and USB transceiver
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CRC generator and checker
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Packet Identifier (PID) decoder
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Forced Error Conditions
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USB 2.0 Test Modes
USB Protocol Controller
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Host to Device Communication
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Automatic retry of failed packets
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Up to 3 Isochronous, Bulk, or Interrupt physical endpoints, each with a configurable packet buffer
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Up to 30 virtual endpoints can be mapped to the physical endpoints
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Configurable Control Endpoint 0
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Interface to packet buffers
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Software controlled disconnect signaling allows device enumeration
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Software control of USB suspend and root port reset detection
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Software controlled device remote wakeup
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Software control of root port wakeup
Endpoint Packet Buffers
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Choice from 4 preset configurations simplify programming
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Separate 128 byte, packet buffer for physical endpoint 0
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3 Kbytes of configurable packet buffer memory for physical endpoints A, B, and C
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Supports Max Packet Size up to 1K bytes, double buffered
Local Bus Interface
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Provides slave interfaces to 8-bit or 16-bit CPU
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Provides access to internal Transmit and Receive packet buffers.
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Supports Split DMA transactions (DMA and CPU on separate data bus)
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Supports DMA burst mode.
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Local interface supports both DMA and Interrupt transfers
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Supports optional multiplexed Address/Data bus using ALE for low pin count applications
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Supports indirect addressing, allowing access to all registers with only a single address bit
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Supports 5V tolerant I/O
Configuration Registers
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Internal registers are accessible from the local bus
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Main registers for common functions
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USB Registers for the USB Interface Module
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Control registers for each endpoint
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