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M58LR128HT 数据表(PDF) 53 Page - STMicroelectronics |
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M58LR128HT 数据表(HTML) 53 Page - STMicroelectronics |
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53 / 112 page ![]() M58LR128HT, M58LR128HB Program and erase times and endurance cycles 53/112 10 Program and erase times and endurance cycles The Program and Erase times and the number of Program/ Erase cycles per block are shown in Table 17. Exact erase times may change depending on the memory array condition. The best case is when all the bits in the block are at ‘0’ (pre-programmed). The worst case is when all the bits in the block are at ‘1’ (not preprogrammed). Usually, the system overhead is negligible with respect to the erase time. In the M58LR128HT/B the maximum number of Program/Erase cycles depends on the VPP voltage supply used. Table 17. Program/Erase times and endurance cycles(1) (2) Parameter Condition Min Typ Typical after 100kW/E Cycles Max Unit Erase Parameter Block (16 KWord) 0.4 1 2.5 s Main Block (64 KWord) Preprogrammed 1.2 3 4 s Not Preprogrammed 1.5 4 s Program(3) Single Word Word Program 12 180 µs Buffer Program 12 180 µs Buffer (32 Words) (Buffer Program) 384 µs Main Block (64 KWord) 768 ms Suspend Latency Program 5 10 µs Erase 5 20 µs Program/Erase Cycles (per Block) Main Blocks 100,000 cycles Parameter Blocks 100,000 cycles |
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