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M58LR128HT 数据表(PDF) 37 Page - STMicroelectronics |
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M58LR128HT 数据表(HTML) 37 Page - STMicroelectronics |
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37 / 112 page ![]() M58LR128HT, M58LR128HB Status Register 37/112 Table 9. Status Register bits Bit Name Type Logic Level(1) 1. Logic level '1' is High, '0' is Low. Definition SR7 P/E.C. Status Status '1' Ready '0' Busy SR6 Erase Suspend Status Status '1' Erase Suspended '0' Erase In progress or Completed SR5 Erase/Blank Check Status Error '1' Erase/Blank Check Error '0' Erase/Blank Check Success SR4 Program Status Error '1' Program Error '0' Program Success SR3 VPP Status Error '1' VPP Invalid, Abort '0' VPP OK SR2 Program Suspend Status Status '1' Program Suspended '0' Program In Progress or Completed SR1 Block Protection Status Error '1' Program/Erase on protected Block, Abort '0' No operation to protected blocks SR0 Bank Write Status Status '1' SR7 = ‘1’ Not Allowed SR7 = ‘0’ Program or erase operation in a bank other than the addressed bank '0' SR7 = ‘1’ No Program or erase operation in the device SR7 = ‘0’ Program or erase operation in addressed bank Multiple Word Program Status (Buffer Enhanced Factory Program mode) Status '1' SR7 = ‘1’ Not Allowed SR7 = ‘0’ the device is NOT ready for the next Buffer loading or is going to exit the BEFP mode '0' SR7 = ‘1’ the device has exited the BEFP mode SR7 = ‘0’ the device is ready for the next Buffer loading |
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