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ST7LITE49M 数据表(PDF) 134 Page - STMicroelectronics

部件名 ST7LITE49M
功能描述  8-bit MCU with single voltage Flash memory data EEPROM, ADC, 8/12-bit timers, and I²C interface
PDF  188 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7LITE49M 数据表(HTML) 134 Page - STMicroelectronics

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Instruction set
ST7LITE49M
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12.1.1
Inherent mode
All Inherent instructions consist of a single byte. The opcode fully specifies all the required
information for the CPU to process the operation.
Long
Indirect
Indexed
ld
A,([$10.w],X)
0000..FFFF
00..FF
word
+ 2
Relative
Direct
jrne loop
PC-
128/PC+127(1)
+ 1
Relative
Indirect
jrne [$10]
PC-
128/PC+127(1)
00..FF
byte
+ 2
Bit
Direct
bset $10,#7
00..FF
+ 1
Bit
Indirect
bset [$10],#7
00..FF
00..FF
byte
+ 2
Bit
Direct
Relative
btjt
$10,#7,skip
00..FF
+ 2
Bit
Indirect
Relative
btjt
[$10],#7,skip
00..FF
00..FF
byte
+ 3
1.
At the time the instruction is executed, the Program Counter (PC) points to the instruction following JRxx.
Table 58.
ST7 addressing mode overview (continued)
Mode
Syntax
Destination/
source
Pointer
address
Pointer
size
Length
(bytes)
Table 59.
Instructions supporting Inherent addressing mode
Instruction
Function
NOP
No operation
TRAP
S/W interrupt
WFI
Wait for interrupt (low power mode)
HALT
Halt oscillator (lowest power mode)
RET
Subroutine return
IRET
Interrupt subroutine return
SIM
Set interrupt mask
RIM
Reset interrupt mask
SCF
Set carry flag
RCF
Reset carry flag
RSP
Reset stack pointer
LD
Load
CLR
Clear
PUSH/POP
Push/Pop to/from the stack
INC/DEC
Increment/decrement
TNZ
Test negative or zero
CPL, NEG
1 or 2 complement



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