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ST10F271 数据表(PDF) 131 Page - STMicroelectronics |
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ST10F271 数据表(HTML) 131 Page - STMicroelectronics |
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131 / 173 page ![]() ST10F271 Electrical characteristics 131/173 24.7 A/D converter characteristics VDD = 5V ± 10%, VSS = 0V, TA = –40 to +125°C, 4.5V ≤ VAREF ≤ VDD, VSS ≤ VAGND ≤ VSS + 0.2V Erase Suspend Latency (4) –30 30 µs Erase Suspend Request Rate (4) 20 20 20 ms Min delay between 2 requests Set Protection (4) 40 90 300 µs 1. The figures are given after about 100 cycles due to testing routines (0 cycles at the final customer). 2. Word and Double Word Programming times are provided as average values derived from a full sector programming time: absolute value of a Word or Double Word Programming time could be longer than the average value. 3. Bank Erase is obtained through a multiple Sector Erase operation (setting bits related to all sectors of the Bank). As ST10F271 implements only one bank, the Bank Erase operation is equivalent to Module and Chip Erase operations. 4. Not 100% tested, guaranteed by Design Characterization. Table 64. Flash characteristics Parameter Typical Maximum Unit Notes TA = 25°C TA = 125°C 0 cycles(1) 0 cycles(1) 100k cycles Table 65. Flash data retention characteristics Number of program / erase cycles (-40°C ≤ T A ≤ 125°C) Data retention time (average ambient temperature 60°C) 128Kbyte (code store) 64Kbyte (EEPROM emulation) (1) 0 - 100 > 20 years > 20 years 1,000 - > 20 years 10,000 - 10 years 100,000 - 1 year 1. Two 64Kbyte Flash Sectors may be typically used to emulate up to 4, 8 or 16Kbyte of EEPROM. Therefore, in case of an emulation of a 16Kbyte EEPROM, 100,000 Flash Program / Erase cycles are equivalent to 800,000 EEPROM Program/Erase cycles. For an efficient use of the EEPROM Emulation please refer to dedicated Application Note document (AN2061 - “EEPROM Emulation with ST10F2xx”). Contact your local field service, local sales person or STMicroelectronics representative to get copy of such a guideline document. Table 66. A/D converter characteristics Parameter Symbol Limit Values Unit Test Condition min. max. Analog Reference voltage 1) V AREF SR 4.5 VDD V Analog Ground voltage V AGND SR VSS VSS + 0.2 V |
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