PIC16F753 datasheet(30/230 Pages) MICROCHIP

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PIC16F753/HV753

DS40001709C-page 30

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3.5

Writing the Flash Program

Memory

A word of the Flash program memory may only be

written to if the word is in an unprotected segment of

memory.

Flash program memory must be written in four-word

blocks. See Figure 3-2 and Figure 3-3 for more details.

A block consists of four words with sequential

addresses, with a lower boundary defined by an

address, where PMADRL<1:0> = 00. All block writes to

program memory are done as 16-word erase by four-

word write operations. The write operation is edge-

aligned and cannot occur across boundaries.

To write program data, it must first be loaded into the

buffer registers (see Figure 3-2). This is accomplished

by first writing the destination address to PMADRL and

PMADRH and then writing the data to PMDATL and

PMDATH. After the address and data have been set

up, then the following sequence of events must be

executed:

Write 55h, then AAh, to PMCON2 (Flash

programming sequence).

Set the WR control bit of the PMCON1 register.

All four buffer register locations should be written to

with correct data. If less than four words are being

written to in the block of four words, then a read from

the program memory location(s) not being written to

must be performed. This takes the data from the

program location(s) not being written and loads it into

the PMDATL and PMDATH registers. Then the

sequence of events to transfer data to the buffer

registers must be executed.

To transfer data from the buffer registers to the program

memory, the PMADRL and PMADRH must point to the

last location in the four-word block (PMADRL<1:0> =

). Then the following sequence of events must be

executed:

Write 55h, then AAh, to PMCON2 (Flash

programming sequence).

Set control bit WR of the PMCON1 register to

begin the write operation.

The user must follow the same specific sequence to

initiate the write for each word in the program block,

writing each program word in sequence (000, 001,

010

, 011). When the write is performed on the last

word (PMADRL<1:0> = 11), a block of sixteen words is

automatically erased and the content of the four-word

buffer registers are written into the program memory.

After the “BSF PMCON1,WR” instruction, the processor

requires two cycles to set up the erase/write operation.

The user must place two NOP instructions after the WR

bit is set. Since data is being written to buffer registers,

the writing of the first three words of the block appears

to occur immediately. The processor will halt internal

operations for the typical 4 ms, only during the cycle in

which the erase takes place (i.e., the last word of the

sixteen-word block erase). This is not Sleep mode as

the clocks and peripherals will continue to run. After

the four-word write cycle, the processor will resume

operation with the third instruction after the PMCON1

write instruction. The above sequence must be

repeated for the higher 12 words.

3.6

Protection Against Spurious Write

There are conditions when the device should not write

to the program memory. To protect against spurious

writes, various mechanisms have been built in. On

power-up, WREN is cleared. Also, the Power-up Timer

(64 ms duration) prevents program memory writes.

The write initiate sequence and the WREN bit help

prevent an accidental write during brown-out, power

glitch or software malfunction.

3.7

Operation During Code-Protect

When the device is code-protected, the CPU is able to

read and write unscrambled data to the program

memory.

3.8

Operation During Write Protect

When the program memory is write-protected, the CPU

can read and execute from the program memory. The

portions of program memory that are write-protected

can be modified by the CPU using the PMCON

registers, but the protected program memory cannot be

modified using ICSP mode.

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